summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorcinap_lenrek <cinap_lenrek@gmx.de>2013-08-04 01:52:46 +0200
committercinap_lenrek <cinap_lenrek@gmx.de>2013-08-04 01:52:46 +0200
commita269ced358a6c79708a41c42ae1978599fb5634a (patch)
tree8cf739f5413f6d433d7384c07b70efdf3d2d3f50
parent7dee88ec33e281ae3771e95b6dfe35e9f6ce4fd4 (diff)
apply richard millers arm debug fixes (from sources)
From richard: A couple of patches applied yesterday should make debugging on ARM a bit more reliable. Using db or acid on ARM, you may have noticed that a program being debugged would sometimes execute through a breakpoint without stopping, or run away while being single stepped. It turns out, as often happens, that one symptom had two separate causes. For details: /n/sources/patch/applied/5db-condcode/readme /n/sources/patch/applied/arm-bkpt-cond/readme To take advantage of the patches, rebuild libmach.a, then acid and db. On machines with a kw kernel (sheevaplug et al), you'll also want to rebuild /arm/9plug; otherwise breakpoints will stop working at all. The new 9plug will, however, still work with the old libmach; and the bcm and teg2 kernels are already compatible with the new libmach.
-rw-r--r--sys/src/9/kw/trap.c29
-rw-r--r--sys/src/libmach/5db.c4
2 files changed, 21 insertions, 12 deletions
diff --git a/sys/src/9/kw/trap.c b/sys/src/9/kw/trap.c
index f4d2c7756..ebd98db6f 100644
--- a/sys/src/9/kw/trap.c
+++ b/sys/src/9/kw/trap.c
@@ -214,6 +214,7 @@ intrs(Ureg *ur, int sort)
iprint("spurious irq%s interrupt: %8.8lux\n", irq.name, ibits);
s = splfhi();
*irq.irq &= ibits;
+ *irq.irqmask &= ~ibits;
splx(s);
}
}
@@ -416,6 +417,9 @@ trap(Ureg *ureg)
case PsrMabt: /* prefetch fault */
ldrexvalid = 0;
faultarm(ureg, ureg->pc, user, 1);
+ if(up->nnote == 0 &&
+ (*(u32int*)ureg->pc & ~(0xF<<28)) == 0x01200070)
+ postnote(up, 1, "sys: breakpoint", NDebug);
break;
case PsrMabt+1: /* data fault */
ldrexvalid = 0;
@@ -479,16 +483,21 @@ trap(Ureg *ureg)
break;
case PsrMund: /* undefined instruction */
if(user){
- /* look for floating point instructions to interpret */
- x = spllo();
- rv = fpiarm(ureg);
- splx(x);
- if(rv == 0){
- ldrexvalid = 0;
- snprint(buf, sizeof buf,
- "undefined instruction: pc %#lux",
- ureg->pc);
- postnote(up, 1, buf, NDebug);
+ if(seg(up, ureg->pc, 0) != nil &&
+ (*(u32int*)ureg->pc & ~(0xF<<28)) == 0x01200070)
+ postnote(up, 1, "sys: breakpoint", NDebug);
+ else{
+ /* look for floating point instructions to interpret */
+ x = spllo();
+ rv = fpiarm(ureg);
+ splx(x);
+ if(rv == 0){
+ ldrexvalid = 0;
+ snprint(buf, sizeof buf,
+ "undefined instruction: pc %#lux",
+ ureg->pc);
+ postnote(up, 1, buf, NDebug);
+ }
}
}else{
iprint("undefined instruction: pc %#lux inst %#ux\n",
diff --git a/sys/src/libmach/5db.c b/sys/src/libmach/5db.c
index c477ec44c..b3d43008c 100644
--- a/sys/src/libmach/5db.c
+++ b/sys/src/libmach/5db.c
@@ -61,7 +61,7 @@ static int arminstlen(Map*, uvlong);
*/
Machdata armmach =
{
- {0x70, 0x00, 0x20, 0xD1}, /* break point */ /* D1200070 */
+ {0x70, 0x00, 0x20, 0xE1}, /* break point */ /* E1200070 */
4, /* break point size */
leswab, /* short to local byte order */
@@ -602,7 +602,7 @@ armcondpass(Map *map, Rgetter rget, uchar cond)
case 10: return n == v;
case 11: return n != v;
case 12: return !z && (n == v);
- case 13: return z && (n != v);
+ case 13: return z || (n != v);
case 14: return 1;
case 15: return 0;
}