diff options
| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2014-11-04 05:52:42 +0100 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2014-11-04 05:52:42 +0100 |
| commit | f5e45a02d4e1621a9720b3abcadd6b12e7fb4be0 (patch) | |
| tree | 65609656faebef6861f439033f1e1fd02197fb10 | |
| parent | 32b5b2f42db04ed84197392cebf2930b2208ae20 (diff) | |
pc: enable page size extension early in apbootstrap
vmware in efi mode brings application processors up
with CR4 = 0 (pse disabled) which makes us page fault
when accessing the ap's pdb which might be in a 4MB
mapping when the boot processor used pse to setup
page tables.
so we unconditionally enable pse in apbootstrap
(and disable pae in case of surprises).
| -rw-r--r-- | sys/src/9/pc/apbootstrap.s | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/sys/src/9/pc/apbootstrap.s b/sys/src/9/pc/apbootstrap.s index 5407530f0..14d115224 100644 --- a/sys/src/9/pc/apbootstrap.s +++ b/sys/src/9/pc/apbootstrap.s @@ -73,6 +73,11 @@ TEXT _ap32(SB), $0 MOVL DX, (PDO(0))(CX) MOVL CX, CR3 /* load and flush the mmu */ + MOVL CR4, AX + ANDL $~0x00000020, AX /* ~PAE */ + ORL $0x00000010, AX /* PSE */ + MOVL AX, CR4 + MOVL CR0, DX ORL $0x80010000, DX /* PG|WP */ ANDL $~0x6000000A, DX /* ~(CD|NW|TS|MP) */ |