diff options
| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2023-10-29 15:39:34 +0000 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2023-10-29 15:39:34 +0000 |
| commit | 3c1b0ad9d3acfcd63584173552c05fab2d931914 (patch) | |
| tree | d0682e9d55e0ab0af40abf961c5af2cc6711cf48 | |
| parent | 57277ea614a3756c538a45003e64f07f5ea141cc (diff) | |
imx8: use generic 9/arm64/^(init9.s rebootcode.s)
| -rw-r--r-- | sys/src/9/imx8/init9.s | 4 | ||||
| -rw-r--r-- | sys/src/9/imx8/mkfile | 4 | ||||
| -rw-r--r-- | sys/src/9/imx8/rebootcode.s | 48 |
3 files changed, 4 insertions, 52 deletions
diff --git a/sys/src/9/imx8/init9.s b/sys/src/9/imx8/init9.s deleted file mode 100644 index 45ae62fea..000000000 --- a/sys/src/9/imx8/init9.s +++ /dev/null @@ -1,4 +0,0 @@ -TEXT main(SB), 1, $8 - MOV $setSB(SB), R28 /* load the SB */ - MOV $boot(SB), R0 - B startboot(SB) diff --git a/sys/src/9/imx8/mkfile b/sys/src/9/imx8/mkfile index 248f7b27e..35c7c30ea 100644 --- a/sys/src/9/imx8/mkfile +++ b/sys/src/9/imx8/mkfile @@ -89,6 +89,10 @@ ARM64FILES=`{../port/mkfilelist ../arm64} cache.v8.$O: ../arm64/cache.v8.s $AS $AFLAGS -I. -. ../arm64/cache.v8.s +init9.$O: ../arm64/init9.s + $AS $AFLAGS -I. -. ../arm64/init9.s +rebootcode.$O: ../arm64/rebootcode.s + $AS $AFLAGS -I. -. ../arm64/rebootcode.s <../boot/bootmkfile <../port/portmkfile diff --git a/sys/src/9/imx8/rebootcode.s b/sys/src/9/imx8/rebootcode.s deleted file mode 100644 index 4406350f2..000000000 --- a/sys/src/9/imx8/rebootcode.s +++ /dev/null @@ -1,48 +0,0 @@ -#include "mem.h" -#include "sysreg.h" - -#undef SYSREG -#define SYSREG(op0,op1,Cn,Cm,op2) SPR(((op0)<<19|(op1)<<16|(Cn)<<12|(Cm)<<8|(op2)<<5)) - -TEXT _start(SB), 1, $-4 - MOV $setSB(SB), R28 - - MOV R0, R27 - - MOV code+8(FP), R1 - MOVWU size+16(FP), R2 - BIC $3, R2 - ADD R1, R2, R3 - -_copy: - MOVW (R1)4!, R4 - MOVW R4, (R0)4! - CMP R1, R3 - BNE _copy - - BL cachedwbinv(SB) - BL l2cacheuwbinv(SB) - - ISB $SY - MRS SCTLR_EL1, R0 - BIC $(1<<0 | 1<<2 | 1<<12), R0 - ISB $SY - MSR R0, SCTLR_EL1 - ISB $SY - - DSB $NSHST - TLBI R0, 0,8,7,0 /* VMALLE1 */ - DSB $NSH - ISB $SY - - BL cachedwbinv(SB) - BL cacheiinv(SB) - - MOVWU $0, R0 - MOVWU $0, R1 - MOVWU $0, R2 - MOVWU $0, R3 - - MOV R27, LR - - RETURN |