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authorcinap_lenrek <cinap_lenrek@felloff.net>2018-10-28 06:16:10 +0100
committercinap_lenrek <cinap_lenrek@felloff.net>2018-10-28 06:16:10 +0100
commitb715c39bfa1e2169f450f719ba8a7643c7b39b68 (patch)
treedc5becbf9c6826e8e17b34fe84723630e8410ad5 /sys/src/9/bcm/mmu.c
parent0fc2adb43dc8be67b6eca49e3e28339367a01246 (diff)
bcm: simplify reboot code
- synchronize rebootcode installation - handle the 1MB identity map in mmu.c (mmuinit1()) - do not overlap CONFADDR with rebootcode, the non boot processors are parked there. - make REBOOTADDR physical address
Diffstat (limited to 'sys/src/9/bcm/mmu.c')
-rw-r--r--sys/src/9/bcm/mmu.c15
1 files changed, 8 insertions, 7 deletions
diff --git a/sys/src/9/bcm/mmu.c b/sys/src/9/bcm/mmu.c
index af647285f..431c2bff9 100644
--- a/sys/src/9/bcm/mmu.c
+++ b/sys/src/9/bcm/mmu.c
@@ -12,6 +12,7 @@
#define L2AP(ap) l2ap(ap)
#define L1ptedramattrs soc.l1ptedramattrs
#define L2ptedramattrs soc.l2ptedramattrs
+#define PTEDRAM (PHYSDRAM|Dom0|L1AP(Krw)|Section|L1ptedramattrs)
enum {
L1lo = UZERO/MiB, /* L1X(UZERO)? */
@@ -43,7 +44,7 @@ mmuinit(void *a)
/*
* identity map first MB of ram so mmu can be enabled
*/
- l1[L1X(PHYSDRAM)] = PHYSDRAM|Dom0|L1AP(Krw)|Section|L1ptedramattrs;
+ l1[L1X(PHYSDRAM)] = PTEDRAM;
/*
* map i/o registers
@@ -65,19 +66,19 @@ mmuinit(void *a)
l2[L2X(va)] = PHYSDRAM|L2AP(Krw)|Small|L2ptedramattrs;
}
+/*
+ * enable/disable identity map of first MB of ram
+ */
void
-mmuinit1()
+mmuinit1(int on)
{
PTE *l1;
l1 = m->mmul1;
-
- /*
- * undo identity map of first MB of ram
- */
- l1[L1X(PHYSDRAM)] = 0;
+ l1[L1X(PHYSDRAM)] = on? PTEDRAM: Fault;
cachedwbtlb(&l1[L1X(PHYSDRAM)], sizeof(PTE));
mmuinvalidateaddr(PHYSDRAM);
+ mmuinvalidate();
}
static void