diff options
| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2021-11-07 17:47:09 +0000 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2021-11-07 17:47:09 +0000 |
| commit | 80268af29eb1dfc1ca4fc528f70c5af17286dd2c (patch) | |
| tree | 11317aae20e8027557b869ef66666d6a89190a77 /sys/src/9/bcm64 | |
| parent | a2baa8634834b462a613ff6cc74becee2efc9a3c (diff) | |
bcm64/sdhc: add *emmc2bus kernel parameter to set dma dram bus address
On the raspberry pi 4, depending on the chip revision,
the emmc2 controller has different dram bus address window,
so make it configurable.
Diffstat (limited to 'sys/src/9/bcm64')
| -rw-r--r-- | sys/src/9/bcm64/sdhc.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/sys/src/9/bcm64/sdhc.c b/sys/src/9/bcm64/sdhc.c index 5d4fb07a5..48426ff7b 100644 --- a/sys/src/9/bcm64/sdhc.c +++ b/sys/src/9/bcm64/sdhc.c @@ -199,11 +199,11 @@ enum { struct Ctlr { Rendez r; - Rendez cardr; int fastclock; ulong extclk; int appcmd; Adma *dma; + uintptr busdram; }; static Ctlr emmc; @@ -247,7 +247,7 @@ dmaalloc(void *addr, int len) p->desc |= len<<OLength | End | Int; else p->desc |= Maxdma<<OLength; - p->addr = dmaaddr((void*)a); + p->addr = emmc.busdram + (PADDR(a) - PHYSDRAM); a += Maxdma; len -= Maxdma; n--; @@ -293,7 +293,11 @@ emmcinit(void) { u32int *r; ulong clk; + char *s; + emmc.busdram = soc.busdram; + if((s = getconf("*emmc2bus")) != nil) + emmc.busdram = strtoull(s, nil, 16); clk = getclkrate(ClkEmmc2); if(clk == 0){ clk = Extfreq; @@ -401,9 +405,9 @@ emmccmd(u32int cmd, u32int arg, u32int *resp) WR(Interrupt, i); } WR(Cmdtm, c); - now = m->ticks; + now = MACHP(0)->ticks; while(((i=r[Interrupt])&(Cmddone|Err)) == 0) - if(m->ticks-now > HZ) + if(MACHP(0)->ticks - now > HZ) break; if((i&(Cmddone|Err)) != Cmddone){ if((i&~(Err|Cardintr)) != Ctoerr) @@ -507,7 +511,7 @@ emmciosetup(int write, void *buf, int bsize, int bcount) cachedwbse(buf, len); else cachedwbinvse(buf, len); - WR(Dmadesc, dmaaddr(emmc.dma)); + WR(Dmadesc, emmc.busdram + (PADDR(emmc.dma) - PHYSDRAM)); okay(1); } @@ -549,8 +553,6 @@ mmcinterrupt(Ureg*, void*) i = r[Interrupt]; if(i&(Datadone|Err)) wakeup(&emmc.r); - if(i&Cardintr) - wakeup(&emmc.cardr); WR(Irpten, r[Irpten] & ~i); } |