diff options
| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2019-05-13 19:21:14 +0200 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2019-05-13 19:21:14 +0200 |
| commit | adf96a529e10eaa90cdc3a4a02c88d5300c9ab52 (patch) | |
| tree | cd6c82456cdee64fe501ac4e1f69463b3bdc933d /sys/src/9/bcm | |
| parent | a3b5e3994f7f2897ab1b5bb20b91224d145c1fc1 (diff) | |
bcm: add cache invalidate before accessing prop buffer
Diffstat (limited to 'sys/src/9/bcm')
| -rw-r--r-- | sys/src/9/bcm/vcore.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/src/9/bcm/vcore.c b/sys/src/9/bcm/vcore.c index bc5b6a1b9..53293b0d4 100644 --- a/sys/src/9/bcm/vcore.c +++ b/sys/src/9/bcm/vcore.c @@ -147,7 +147,7 @@ vcreq(int tag, void *buf, int vallen, int rsplen) prop->taglen = vallen; if(vallen > 0) memmove(prop->data, buf, vallen); - cachedwbinvse(prop, prop->len); + cachedwbinvse(prop, n); for(;;){ aprop = busaddr? dmaaddr(prop) : (uintptr)prop; vcwrite(ChanProps, aprop); @@ -158,6 +158,7 @@ vcreq(int tag, void *buf, int vallen, int rsplen) return -1; busaddr = 0; } + cachedinvse(prop, n); if(prop->req == RspOk && prop->tag == tag && (prop->taglen&TagResp)) { |