diff options
| author | Sigrid Solveig Haflínudóttir <sigrid@ftrv.se> | 2022-08-15 23:42:15 +0000 |
|---|---|---|
| committer | Sigrid Solveig Haflínudóttir <sigrid@ftrv.se> | 2022-08-15 23:42:15 +0000 |
| commit | 7fd7d627e565b624e9cc1fecd837deb82f035d33 (patch) | |
| tree | 9fc4c90af42f09a86fac7403285138a838428fa4 /sys/src/9/imx8/ccm.c | |
| parent | 423b54a0aeea198c8d4c0cbb23a17236d68910ec (diff) | |
imx8: enable/expose tmu
Diffstat (limited to 'sys/src/9/imx8/ccm.c')
| -rw-r--r-- | sys/src/9/imx8/ccm.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sys/src/9/imx8/ccm.c b/sys/src/9/imx8/ccm.c index ec83b5fb5..f0a529fcc 100644 --- a/sys/src/9/imx8/ccm.c +++ b/sys/src/9/imx8/ccm.c @@ -760,6 +760,8 @@ static Clock clocks[] = { { "pcie_mem.mstr_axi_clk", MAIN_AXI_CLK_ROOT, 37 }, { "pcie_mem.slv_axi_clk", MAIN_AXI_CLK_ROOT, 37 }, + { "tmu.clk", IPG_CLK_ROOT, 98 }, + { "pcie2_clk_rst.auxclk", PCIE2_AUX_CLK_ROOT, 100 }, { "pcie2_clk_rst.mstr_axi_clk", MAIN_AXI_CLK_ROOT, 100 }, { "pcie2_clk_rst.slv_axi_clk", MAIN_AXI_CLK_ROOT, 100 }, |