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authorcinap_lenrek <cinap_lenrek@felloff.net>2022-05-08 16:50:29 +0000
committercinap_lenrek <cinap_lenrek@felloff.net>2022-05-08 16:50:29 +0000
commitfff070f2cbb01b7c0879e9dcb13ee4e3ed2497f0 (patch)
tree44899a9ae6e8143740a4b02e7d50a3b6db768008 /sys/src/9/imx8/main.c
parent9126ee3eea90d639f4e877c01400248581d10f65 (diff)
imx8: add work in progress i.MX8MQ kernel for the mntreform2 laptop
This is a work in progress port to the mntreform2 laptop. Working so far: - mmu (same as raspberry pi 3b+) - arm generic timer - gicv3 - uart1 - enet With access to the uart, one can netboot this kernel in u-boot using the following commands: > dhcp > bootm
Diffstat (limited to 'sys/src/9/imx8/main.c')
-rw-r--r--sys/src/9/imx8/main.c218
1 files changed, 218 insertions, 0 deletions
diff --git a/sys/src/9/imx8/main.c b/sys/src/9/imx8/main.c
new file mode 100644
index 000000000..6f9406564
--- /dev/null
+++ b/sys/src/9/imx8/main.c
@@ -0,0 +1,218 @@
+#include "u.h"
+#include "tos.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "../port/error.h"
+#include "pool.h"
+#include "io.h"
+#include "sysreg.h"
+
+Conf conf;
+
+/*
+ * starting place for first process
+ */
+void
+init0(void)
+{
+ char **sp;
+
+ chandevinit();
+
+ if(!waserror()){
+ ksetenv("cputype", "arm64", 0);
+ if(cpuserver)
+ ksetenv("service", "cpu", 0);
+ else
+ ksetenv("service", "terminal", 0);
+ ksetenv("console", "0", 0);
+ poperror();
+ }
+ kproc("alarm", alarmkproc, 0);
+ sp = (char**)(USTKTOP-sizeof(Tos) - 8 - sizeof(sp[0])*4);
+ sp[3] = sp[2] = sp[1] = nil;
+ strcpy(sp[1] = (char*)&sp[4], "boot");
+ sp[0] = (void*)&sp[1];
+ touser((uintptr)sp);
+}
+
+void
+confinit(void)
+{
+ int userpcnt;
+ ulong kpages;
+ char *p;
+ int i;
+
+ conf.nmach = 1;
+
+ if(p = getconf("service")){
+ if(strcmp(p, "cpu") == 0)
+ cpuserver = 1;
+ else if(strcmp(p,"terminal") == 0)
+ cpuserver = 0;
+ }
+
+ if(p = getconf("*kernelpercent"))
+ userpcnt = 100 - strtol(p, 0, 0);
+ else
+ userpcnt = 0;
+
+ if(userpcnt < 10)
+ userpcnt = 60 + cpuserver*10;
+
+ conf.npage = 0;
+ for(i = 0; i < nelem(conf.mem); i++)
+ conf.npage += conf.mem[i].npage;
+
+ kpages = conf.npage - (conf.npage*userpcnt)/100;
+ if(kpages > ((uintptr)-VDRAM)/BY2PG)
+ kpages = ((uintptr)-VDRAM)/BY2PG;
+
+ conf.upages = conf.npage - kpages;
+ conf.ialloc = (kpages/2)*BY2PG;
+
+ /* set up other configuration parameters */
+ conf.nproc = 100 + ((conf.npage*BY2PG)/MB)*5;
+ if(cpuserver)
+ conf.nproc *= 3;
+ if(conf.nproc > 2000)
+ conf.nproc = 2000;
+ conf.nswap = conf.npage*3;
+ conf.nswppo = 4096;
+ conf.nimage = 200;
+
+ conf.copymode = conf.nmach > 1;
+
+ /*
+ * Guess how much is taken by the large permanent
+ * datastructures. Mntcache and Mntrpc are not accounted for.
+ */
+ kpages = conf.npage - conf.upages;
+ kpages *= BY2PG;
+ kpages -= conf.upages*sizeof(Page)
+ + conf.nproc*sizeof(Proc)
+ + conf.nimage*sizeof(Image)
+ + conf.nswap
+ + conf.nswppo*sizeof(Page*);
+ mainmem->maxsize = kpages;
+ if(!cpuserver)
+ /*
+ * give terminals lots of image memory, too; the dynamic
+ * allocation will balance the load properly, hopefully.
+ * be careful with 32-bit overflow.
+ */
+ imagmem->maxsize = kpages;
+
+}
+
+void
+machinit(void)
+{
+ m->ticks = 1;
+ m->perf.period = 1;
+ active.machs[m->machno] = 1;
+}
+
+void
+main(void)
+{
+ machinit();
+ if(m->machno){
+ trapinit();
+ fpuinit();
+ intrinit();
+ clockinit();
+ // cpuidprint();
+ synccycles();
+ timersinit();
+ flushtlb();
+ mmu1init();
+ m->ticks = MACHP(0)->ticks;
+ schedinit();
+ return;
+ }
+ quotefmtinstall();
+ meminit();
+ confinit();
+ xinit();
+ uartconsinit();
+ printinit();
+ print("\nPlan 9\n");
+ trapinit();
+ fpuinit();
+ intrinit();
+ clockinit();
+ timersinit();
+ pageinit();
+ procinit0();
+ initseg();
+ links();
+ chandevreset();
+ userinit();
+// mpinit();
+ mmu0clear((uintptr*)L1);
+ flushtlb();
+ mmu1init();
+ schedinit();
+}
+
+void
+exit(int)
+{
+ cpushutdown();
+ splfhi();
+ for(;;);
+}
+
+int
+isaconfig(char *, int, ISAConf *)
+{
+ return 0;
+}
+
+char*
+getconf(char *)
+{
+ return nil;
+}
+
+void
+writeconf(void)
+{
+}
+
+void
+reboot(void *, void *, ulong)
+{
+}
+
+void
+dmaflush(int clean, void *p, ulong len)
+{
+ uintptr s = (uintptr)p;
+ uintptr e = (uintptr)p + len;
+
+ if(clean){
+ s &= ~(BLOCKALIGN-1);
+ e += BLOCKALIGN-1;
+ e &= ~(BLOCKALIGN-1);
+ cachedwbse((void*)s, e - s);
+ return;
+ }
+ if(s & BLOCKALIGN-1){
+ s &= ~(BLOCKALIGN-1);
+ cachedwbinvse((void*)s, BLOCKALIGN);
+ s += BLOCKALIGN;
+ }
+ if(e & BLOCKALIGN-1){
+ e &= ~(BLOCKALIGN-1);
+ if(e < s)
+ return;
+ cachedwbinvse((void*)e, BLOCKALIGN);
+ }
+ if(s < e)
+ cachedinvse((void*)s, e - s);
+}