diff options
| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2022-07-10 11:35:58 +0000 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2022-07-10 11:35:58 +0000 |
| commit | 32183b1abf7a670e11c59595fda4cd64dad1008b (patch) | |
| tree | df981740dcf697e8c3f4f13b553364a95b1aaec3 /sys/src/9/imx8/rebootcode.s | |
| parent | 414cefcb0b40082d73942ea619de59b371bd685d (diff) | |
imx8: implement /dev/reboot support
Diffstat (limited to 'sys/src/9/imx8/rebootcode.s')
| -rw-r--r-- | sys/src/9/imx8/rebootcode.s | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/sys/src/9/imx8/rebootcode.s b/sys/src/9/imx8/rebootcode.s new file mode 100644 index 000000000..4406350f2 --- /dev/null +++ b/sys/src/9/imx8/rebootcode.s @@ -0,0 +1,48 @@ +#include "mem.h" +#include "sysreg.h" + +#undef SYSREG +#define SYSREG(op0,op1,Cn,Cm,op2) SPR(((op0)<<19|(op1)<<16|(Cn)<<12|(Cm)<<8|(op2)<<5)) + +TEXT _start(SB), 1, $-4 + MOV $setSB(SB), R28 + + MOV R0, R27 + + MOV code+8(FP), R1 + MOVWU size+16(FP), R2 + BIC $3, R2 + ADD R1, R2, R3 + +_copy: + MOVW (R1)4!, R4 + MOVW R4, (R0)4! + CMP R1, R3 + BNE _copy + + BL cachedwbinv(SB) + BL l2cacheuwbinv(SB) + + ISB $SY + MRS SCTLR_EL1, R0 + BIC $(1<<0 | 1<<2 | 1<<12), R0 + ISB $SY + MSR R0, SCTLR_EL1 + ISB $SY + + DSB $NSHST + TLBI R0, 0,8,7,0 /* VMALLE1 */ + DSB $NSH + ISB $SY + + BL cachedwbinv(SB) + BL cacheiinv(SB) + + MOVWU $0, R0 + MOVWU $0, R1 + MOVWU $0, R2 + MOVWU $0, R3 + + MOV R27, LR + + RETURN |