diff options
| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2022-07-09 15:15:55 +0000 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2022-07-09 15:15:55 +0000 |
| commit | 2b89cdee025d9b3faccd62bc3515d7ed749ae26f (patch) | |
| tree | 592449d518d4b2adbb3cb74cb2a8695aad01d149 /sys/src/9/imx8 | |
| parent | 29a6cbf7ee601665c7ca204385d96a6c2a3080d8 (diff) | |
imx8: set virtual timer offset to zero for all cores
we want CNTVCT_EL0 to be the same on all cores,
so we set the offset the same so it effectively
becomes the system counter.
Diffstat (limited to 'sys/src/9/imx8')
| -rw-r--r-- | sys/src/9/imx8/clock.c | 3 | ||||
| -rw-r--r-- | sys/src/9/imx8/l.s | 4 | ||||
| -rw-r--r-- | sys/src/9/imx8/sysreg.h | 1 |
3 files changed, 8 insertions, 0 deletions
diff --git a/sys/src/9/imx8/clock.c b/sys/src/9/imx8/clock.c index 0338856aa..a6b9ab034 100644 --- a/sys/src/9/imx8/clock.c +++ b/sys/src/9/imx8/clock.c @@ -41,6 +41,9 @@ clockinit(void) freq = sysrd(CNTFRQ_EL0); print("timer frequency %lld Hz\n", freq); } + m->cpuhz = freq; + m->cpumhz = (freq + Mhz/2 - 1) / Mhz; + m->cyclefreq = freq; intrenable(IRQcntpns, localclockintr, nil, BUSUNKNOWN, "clock"); } diff --git a/sys/src/9/imx8/l.s b/sys/src/9/imx8/l.s index d51555d58..f08218c66 100644 --- a/sys/src/9/imx8/l.s +++ b/sys/src/9/imx8/l.s @@ -96,6 +96,10 @@ el2: MSR R0, MDCR_EL2 ISB $SY + /* set virtual timer offset to zero */ + MOV $0, R0 + MSR R0, CNTVOFF_EL2 + /* HCR = RW, HCD, SWIO, BSU, FB */ MOVWU $(1<<31 | 1<<29 | 1<<2 | 0<<10 | 0<<9), R0 MSR R0, HCR_EL2 diff --git a/sys/src/9/imx8/sysreg.h b/sys/src/9/imx8/sysreg.h index 46dd1c3cd..b9bbc7142 100644 --- a/sys/src/9/imx8/sysreg.h +++ b/sys/src/9/imx8/sysreg.h @@ -38,6 +38,7 @@ #define CNTP_TVAL_EL0 SYSREG(3,3,14,2,0) #define CNTP_CTL_EL0 SYSREG(3,3,14,2,1) #define CNTP_CVAL_EL0 SYSREG(3,3,14,2,2) +#define CNTVOFF_EL2 SYSREG(3,4,14,0,3) #define TPIDR_EL0 SYSREG(3,3,13,0,2) #define TPIDR_EL1 SYSREG(3,0,13,0,4) |