diff options
| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2022-07-10 13:03:55 +0000 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2022-07-10 13:03:55 +0000 |
| commit | 34dab15f408e8c272af406010b2bc6e5f7b1c473 (patch) | |
| tree | 5d2c1b5d7a111f6744b1239d12e9e44d34bf84d6 /sys/src/9/imx8 | |
| parent | 739e15c17839ae1bf03f9a27ed170f3bcb280430 (diff) | |
imx8: reset lcdif and sn65sdi86 bridge before init
Diffstat (limited to 'sys/src/9/imx8')
| -rw-r--r-- | sys/src/9/imx8/lcd.c | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/sys/src/9/imx8/lcd.c b/sys/src/9/imx8/lcd.c index 3b39a6c74..e69f6ff96 100644 --- a/sys/src/9/imx8/lcd.c +++ b/sys/src/9/imx8/lcd.c @@ -441,6 +441,14 @@ dsiparams(struct dsi_cfg *cfg, int lanes, int hs_clk, int ref_clk, int tx_esc_cl } static void +lcdifreset(void) +{ + wr(lcdif, LCDIF_CTRL_SET, CTRL_SFTRST); + delay(1); + wr(lcdif, LCDIF_CTRL_SET, CTRL_CLKGATE); +} + +static void lcdifinit(struct video_mode *mode) { wr(lcdif, LCDIF_CTRL_CLR, CTRL_SFTRST); @@ -501,6 +509,11 @@ bridgeinit(I2Cdev *dev, struct video_mode *mode, struct dsi_cfg *cfg) { int n; + // soft reset + i2cwritebyte(dev, 0x09, 1); + while(i2creadbyte(dev, 0x09) & 1) + ; + // clock derived from dsi clock switch(cfg->hs_clk/2000000){ case 384: @@ -838,8 +851,10 @@ lcdinit(void) gpioout(GPIO_PIN(3, 20), 1); bridge = i2cdev(i2cbus("i2c4"), 0x2C); - if(bridge == nil) - return; + if(bridge == nil){ + err = "could not find bridge"; + goto out; + } bridge->subaddr = 1; /* power on mipi dsi */ @@ -858,6 +873,8 @@ lcdinit(void) setclkgate("disp.axi_clk", 1); setclkgate("sim_display.mainclk", 1); + lcdifreset(); + setclkrate("mipi.core", "system_pll1_div3", 266*Mhz); setclkrate("mipi.CLKREF", "system_pll2_clk", 25*Mhz); setclkrate("mipi.RxClkEsc", "system_pll1_clk", 80*Mhz); |