kernel: reduce Page structure size by changing Page.cachectl[]

there are no kernels currently that do page coloring,
so the only use of cachectl[] is flushing the icache
(on arm and ppc).

on pc64, cachectl consumes 32 bytes in each page resulting
in over 200 megabytes of overhead for 32gb of ram with 4K
pages.

this change removes cachectl[] and adds txtflush ulong
that is set to ~0 by pio() to instruct putmmu() to flush
the icache.

2 files changed, 3 insertions, 13 deletions

diff --git a/sys/src/9/mtx/main.c b/sys/src/9/mtx/main.c
index 7cb1bad16..491580101 100644
--- a/sys/src/9/mtx/main.c
+++ b/sys/src/9/mtx/main.c
@@ -198,7 +198,7 @@ userinit(void)
 	s->flushme++;
 	p->seg[TSEG] = s;
 	pg = newpage(1, 0, UTZERO);
-	memset(pg->cachectl, PG_TXTFLUSH, sizeof(pg->cachectl));
+	pg->txtflush = ~0;
 	segpage(s, pg);
 	k = kmap(s->map[0]->pages[0]);
 	memmove((ulong*)VA(k), initcode, sizeof initcode);
diff --git a/sys/src/9/mtx/mmu.c b/sys/src/9/mtx/mmu.c
index 255cf5f5a..791c968da 100644
--- a/sys/src/9/mtx/mmu.c
+++ b/sys/src/9/mtx/mmu.c
@@ -179,7 +179,6 @@ void
 putmmu(uintptr va, uintptr pa, Page *pg)
 {
 	int mp;
-	char *ctl;
 	ulong *p, *ep, *q, pteg;
 	ulong vsid, ptehi, x, hash;
 
@@ -218,19 +217,10 @@ putmmu(uintptr va, uintptr pa, Page *pg)
 	q[1] = pa;
 	sync();
 
-	ctl = &pg->cachectl[m->machno];
-	switch(*ctl) {
-	case PG_NEWCOL:
-	default:
-		panic("putmmu: %d\n", *ctl);
-		break;
-	case PG_NOFLUSH:
-		break;
-	case PG_TXTFLUSH:
+	if(pg->txtflush & (1<<m->machno)){
 		dcflush((void*)pg->va, BY2PG);
 		icflush((void*)pg->va, BY2PG);
-		*ctl = PG_NOFLUSH;
-		break;
+		pg->txtflush &= ~(1<<m->machno);
 	}
 }