diff options
| author | google <google@daverabbitz.ath.cx> | 2012-09-19 21:07:44 +1200 |
|---|---|---|
| committer | google <google@daverabbitz.ath.cx> | 2012-09-19 21:07:44 +1200 |
| commit | 1f7eb17f4b887e2f448a73053f3e3ed1b7fdbfda (patch) | |
| tree | 99bc0348690ee55618c47e482ce0045150bc852a /sys/src/9/pc/sdide.c | |
| parent | b65b65df1cb6b46dd40b991a6a3494333be7a9b4 (diff) | |
Enable busmastering for SCH (Poulsbo) PATA controller.
Diffstat (limited to 'sys/src/9/pc/sdide.c')
| -rw-r--r-- | sys/src/9/pc/sdide.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/sys/src/9/pc/sdide.c b/sys/src/9/pc/sdide.c index b9b237c57..071431aae 100644 --- a/sys/src/9/pc/sdide.c +++ b/sys/src/9/pc/sdide.c @@ -2129,6 +2129,10 @@ atapnp(void) map |= 2; irqack = ichirqack; break; + case (0x811a<<16)|0x8086: /* Intel SCH (Poulsbo) */ + map = 1; + irqack = ichirqack; + break; } for(channel = 0; channel < 2; channel++){ if((map & 1<<channel) == 0) @@ -2255,7 +2259,8 @@ ataenable(SDev* sdev) atadmaclr(ctlr); if(ctlr->pcidev != nil) pcisetbme(ctlr->pcidev); - ctlr->prdt = mallocalign(Nprd*sizeof(Prd), 4, 0, 64*1024); + /* Intel SCH requires 8 byte alignment, though datasheet says 4 m( */ + ctlr->prdt = mallocalign(Nprd*sizeof(Prd), 8, 0, 64*1024); } snprint(name, sizeof(name), "%s (%s)", sdev->name, sdev->ifc->name); intrenable(ctlr->irq, atainterrupt, ctlr, ctlr->tbdf, name); |