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authoraiju <aiju@phicode.de>2014-12-24 10:21:51 +0100
committeraiju <aiju@phicode.de>2014-12-24 10:21:51 +0100
commit7a3f0998a0ce7470d70c1a13bc4646abafdcc236 (patch)
tree9cea39d933719c0b82eb242ec286c25eed0d728c /sys/src/9/zynq/io.h
parent6dafa424805d128fcd08c71dca3e3abdc40aa6c6 (diff)
added zynq kernel
Diffstat (limited to 'sys/src/9/zynq/io.h')
-rw-r--r--sys/src/9/zynq/io.h25
1 files changed, 25 insertions, 0 deletions
diff --git a/sys/src/9/zynq/io.h b/sys/src/9/zynq/io.h
new file mode 100644
index 000000000..7baf42e9c
--- /dev/null
+++ b/sys/src/9/zynq/io.h
@@ -0,0 +1,25 @@
+#define PS_CLK 33
+
+#define UART_BASE 0xE0001000
+#define USB0_BASE 0xE0002000
+#define USB1_BASE 0xE0003000
+#define ETH0_BASE 0xE000B000
+#define QSPI_BASE 0xE000D000
+#define SLCR_BASE 0xF8000000
+#define DEVC_BASE 0xF8007000
+#define MPCORE_BASE 0xF8F00000
+#define L2_BASE 0xF8F02000
+#define OCM_BASE 0xFFFC0000
+
+#define TIMERIRQ 29
+#define XADCIRQ 39
+#define DEVCIRQ 40
+#define USB0IRQ 53
+#define ETH0IRQ 54
+#define USB1IRQ 76
+#define UART1IRQ 82
+
+#define LEVEL 0
+#define EDGE 1
+
+#define XADCINTERVAL 500