summaryrefslogtreecommitdiff
path: root/sys/src/9/zynq
diff options
context:
space:
mode:
authorcinap_lenrek <cinap_lenrek@felloff.net>2019-08-26 22:34:38 +0200
committercinap_lenrek <cinap_lenrek@felloff.net>2019-08-26 22:34:38 +0200
commit128ea44a89c7905612ad2fa5a61a9325ddfb5e1e (patch)
treec8d115acc86fb2e50e38af952741b725bd4366ae /sys/src/9/zynq
parent91a8d03040a3533e27f51d33bbbfed33d84b5043 (diff)
kernel: expose no execute bit to portable mmu code as SG_NOEXEC / PTENOEXEC, add PTECACHED bits
a portable SG_NOEXEC segment attribute was added to allow non-executable (physical) segments. which will set the PTENOEXEC bits for putmmu(). in the future, this can be used to make non-executable stack / bss segments. the SG_DEVICE attribute was added to distinguish between mmio regions and uncached memory. only matterns on arm64. on arm, theres the issue that PTEUNCACHED would have no bits set when using the hardware bit definitions. this is the reason bcm, kw, teg2 and omap kernels use arteficial PTE constants. on zynq, the XN bit was used as a hack to give PTEUNCACHED a non-zero value and when the bit is clear then cache attributes where added to the pte. to fix this, PTECACHED constant was added. the portable mmu code in fault.c will now explicitely set PTECACHED bits for cached memory and PTEUNCACHED for uncached memory. that way the hardware bit definitions can be used everywhere.
Diffstat (limited to 'sys/src/9/zynq')
-rw-r--r--sys/src/9/zynq/devarch.c2
-rw-r--r--sys/src/9/zynq/l.s2
-rw-r--r--sys/src/9/zynq/mem.h5
-rw-r--r--sys/src/9/zynq/mmu.c4
4 files changed, 7 insertions, 6 deletions
diff --git a/sys/src/9/zynq/devarch.c b/sys/src/9/zynq/devarch.c
index 85b54c97e..00a368fd6 100644
--- a/sys/src/9/zynq/devarch.c
+++ b/sys/src/9/zynq/devarch.c
@@ -181,7 +181,7 @@ plinit(void)
Physseg seg;
memset(&seg, 0, sizeof seg);
- seg.attr = SG_PHYSICAL | SG_FAULT;
+ seg.attr = SG_PHYSICAL | SG_DEVICE | SG_NOEXEC | SG_FAULT;
seg.name = "axi";
seg.pa = 0x40000000;
seg.size = 0x8000000;
diff --git a/sys/src/9/zynq/l.s b/sys/src/9/zynq/l.s
index cdeebc140..9a7e6e151 100644
--- a/sys/src/9/zynq/l.s
+++ b/sys/src/9/zynq/l.s
@@ -41,7 +41,7 @@ _start2:
CMP.S R2, R3
BGE _start2
- MOVW $(UART_BASE|L2VALID|L2DEVICE|L2KERRW), R0
+ MOVW $(UART_BASE|L2VALID|L2DEVICE|L2NOEXEC|L2KERRW), R0
MOVW $(VMAPL2-KZERO), R1
MOVW R0, (R1)
diff --git a/sys/src/9/zynq/mem.h b/sys/src/9/zynq/mem.h
index 26f5f1d5f..0634265c7 100644
--- a/sys/src/9/zynq/mem.h
+++ b/sys/src/9/zynq/mem.h
@@ -62,6 +62,8 @@
#define PTEVALID L2VALID
#define PTERONLY L2RONLY
#define PTEWRITE L2WRITE
+#define PTENOEXEC L2NOEXEC
+#define PTECACHED L2CACHED
#define PTEUNCACHED L2DEVICE
#define PPN(x) ((x)&~(BY2PG-1))
@@ -114,7 +116,8 @@
#define L2VALID (2|1<<4)
#define L2CACHED (1<<10|1<<8|1<<6|1<<2)
-#define L2DEVICE (1<<0)
+#define L2DEVICE 0
+#define L2NOEXEC (1<<0)
#define L2KERRW L2KERNEL
#define L2KERNEL 0
#define L2USER (1<<5)
diff --git a/sys/src/9/zynq/mmu.c b/sys/src/9/zynq/mmu.c
index 918f930b5..ed6412e70 100644
--- a/sys/src/9/zynq/mmu.c
+++ b/sys/src/9/zynq/mmu.c
@@ -147,8 +147,6 @@ putmmu(uintptr va, uintptr pa, Page *pg)
if(up->l1 == nil)
upallocl1();
- if((pa & PTEUNCACHED) == 0)
- pa |= L2CACHED;
e = &up->l1->va[L1RX(va)];
if((*e & 3) == 0){
p = up->mmufree;
@@ -400,7 +398,7 @@ vmap(uintptr pa, ulong sz)
while(np-- != 0){
if(vp == ve)
panic("vmap: out of vmap space (pa=%#.8lux)", pa);
- *vp++ = pa | L2VALID | L2DEVICE | L2KERRW;
+ *vp++ = pa | L2VALID | L2DEVICE | L2NOEXEC | L2KERRW;
pa += BY2PG;
}
coherence();