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authorcinap_lenrek <cinap_lenrek@felloff.net>2015-02-05 23:08:46 +0100
committercinap_lenrek <cinap_lenrek@felloff.net>2015-02-05 23:08:46 +0100
commit30871030f58f7f845dc5e6301df26acfecd0e5ac (patch)
treef99fd80b34bfec5fc4385f9f55b6c442769a4277 /sys/src/cmd/fplot.c
parentb41ca13526dcdeb526005e5407073c1cbd9b5607 (diff)
aux/vga: remove vbs/vbe from mode, use shs/ehs when sync is ment, prefer detailed timing in edid
vbs/vbe members in Mode was only used in the vesadb and cannot be changed from vgadb. use shs/ehs in drivers when refering to the horizontal sync pulse. clarify the matter in a comment. link detailed timing modes at the head of the edid modelist. these are the modes we'r interested in, not the ones from vesadb.
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