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authorcinap_lenrek <cinap_lenrek@felloff.net>2020-05-22 23:58:24 +0200
committercinap_lenrek <cinap_lenrek@felloff.net>2020-05-22 23:58:24 +0200
commitb86bb35c7d82f097e6572d400527046245b877fd (patch)
tree81d8366c8eaf5cfb7df253d3506ffc88c456bb7f /sys
parent0002fd0cf786d16c9b3e1ab62f0cb92b2461f185 (diff)
pc, pc64: do page attribute table (PAT) init early in cpuidentify()
the page attribute table was initialized in mmuinit(), which is too late for bootscreen(). So now we check for PAT support and insert the write-combine entry early in cpuidentify(). this might have been the cause of some slow EFI framebuffers on machines with overlapping or insufficient MTRR entries.
Diffstat (limited to 'sys')
-rw-r--r--sys/src/9/pc/devarch.c9
-rw-r--r--sys/src/9/pc/mem.h2
-rw-r--r--sys/src/9/pc/mmu.c13
-rw-r--r--sys/src/9/pc64/mem.h3
-rw-r--r--sys/src/9/pc64/mmu.c11
5 files changed, 13 insertions, 25 deletions
diff --git a/sys/src/9/pc/devarch.c b/sys/src/9/pc/devarch.c
index 2da6f5d55..595cbcb8b 100644
--- a/sys/src/9/pc/devarch.c
+++ b/sys/src/9/pc/devarch.c
@@ -749,7 +749,7 @@ cpuidentify(void)
X86type *t, *tab;
uintptr cr4;
ulong regs[4];
- vlong mca, mct;
+ vlong mca, mct, pat;
cpuid(Highstdfunc, regs);
memmove(m->cpuidid, &regs[1], BY2WD); /* bx */
@@ -882,6 +882,13 @@ cpuidentify(void)
rdmsr(0x01, &mct);
}
+ /* IA32_PAT write combining */
+ if((m->cpuiddx & Pat) != 0 && rdmsr(0x277, &pat) != -1){
+ pat &= ~(255LL<<(PATWC*8));
+ pat |= 1LL<<(PATWC*8); /* WC */
+ wrmsr(0x277, pat);
+ }
+
if(m->cpuiddx & Mtrr)
mtrrsync();
diff --git a/sys/src/9/pc/mem.h b/sys/src/9/pc/mem.h
index 56649e305..ef646db7d 100644
--- a/sys/src/9/pc/mem.h
+++ b/sys/src/9/pc/mem.h
@@ -173,3 +173,5 @@
#define getpgcolor(a) 0
+/* PAT entry used for write combining */
+#define PATWC 7
diff --git a/sys/src/9/pc/mmu.c b/sys/src/9/pc/mmu.c
index c0b13674a..614339295 100644
--- a/sys/src/9/pc/mmu.c
+++ b/sys/src/9/pc/mmu.c
@@ -66,11 +66,6 @@ static void memglobal(void);
#define VPTX(va) (((ulong)(va))>>12)
#define vpd (vpt+VPTX(VPT))
-enum {
- /* PAT entry used for write combining */
- PATWC = 7,
-};
-
void
mmuinit(void)
{
@@ -125,14 +120,6 @@ mmuinit(void)
taskswitch(PADDR(m->pdb), (ulong)m + BY2PG);
ltr(TSSSEL);
-
- /* IA32_PAT write combining */
- if((MACHP(0)->cpuiddx & Pat) != 0
- && rdmsr(0x277, &v) != -1){
- v &= ~(255LL<<(PATWC*8));
- v |= 1LL<<(PATWC*8); /* WC */
- wrmsr(0x277, v);
- }
}
/*
diff --git a/sys/src/9/pc64/mem.h b/sys/src/9/pc64/mem.h
index 3a9bf9a1a..c6f9bba70 100644
--- a/sys/src/9/pc64/mem.h
+++ b/sys/src/9/pc64/mem.h
@@ -176,5 +176,8 @@
#define getpgcolor(a) 0
+/* PAT entry used for write combining */
+#define PATWC 7
+
#define RMACH R15 /* m-> */
#define RUSER R14 /* up-> */
diff --git a/sys/src/9/pc64/mmu.c b/sys/src/9/pc64/mmu.c
index f7c8bb7e5..970d0f262 100644
--- a/sys/src/9/pc64/mmu.c
+++ b/sys/src/9/pc64/mmu.c
@@ -38,9 +38,6 @@ enum {
PDE = 0,
MAPBITS = 8*sizeof(m->mmumap[0]),
-
- /* PAT entry used for write combining */
- PATWC = 7,
};
static void
@@ -133,14 +130,6 @@ mmuinit(void)
wrmsr(Star, ((uvlong)UE32SEL << 48) | ((uvlong)KESEL << 32));
wrmsr(Lstar, (uvlong)syscallentry);
wrmsr(Sfmask, 0x200);
-
- /* IA32_PAT write combining */
- if((MACHP(0)->cpuiddx & Pat) != 0
- && rdmsr(0x277, &v) != -1){
- v &= ~(255LL<<(PATWC*8));
- v |= 1LL<<(PATWC*8); /* WC */
- wrmsr(0x277, v);
- }
}
/*