Age | Commit message (Collapse) | Author | |
---|---|---|---|
2019-07-25 | bcm, bcm64: clean dma destination buffer before issuing dma in case of non ↵ | cinap_lenrek | |
cache-line-size aligned buffer | |||
2019-07-25 | bcm, bcm64: add dmaflush() function and make virtio size and virtual address ↵ | cinap_lenrek | |
configurable in Soc.virtio and Soc.iosize | |||
2019-05-19 | bcm, bcm64: fix cache operations for dma and emmc | cinap_lenrek | |
always clean AND invalidate caches before dma read, never just invalidate as the buffer might not be aligned to cache lines... we have to invalidate caches again *AFTER* the dma read has completed. the processor can bring in data speculatively into the cache while the dma in in flight. | |||
2019-05-03 | bcm: don't call nil on PADDR() in dmaaddr(), return busdram dummy address | cinap_lenrek | |
2019-04-11 | bcm: dont assume PHYSDRAM 0 in dmaaddr(), fix dmaioaddr() | cinap_lenrek | |
2018-10-20 | bcm: import changes for raspi2/3 from richard miller | cinap_lenrek | |
2013-01-26 | add raspberry pi kernel (from sources) | cinap_lenrek | |