| Age | Commit message (Collapse) | Author |
|---|
|
We want to support the internal emmc device on the reform,
which has a different initialization sequence from SDcard.
The problem is, all mmc controller drivers where using
the command index to derive the command properties.
The command index's interpretation depends on the
command set. And MMC has different commands then SD.
Also, there are the APP_CMD escaped commands which
drivers then tried to recover the state...
All of this is total nonsense... The controller drivers
should not care and the command properties should
be maintained by port/sdmmc.c.
So we pass the command as a struct SDiocmd, which
has all the properties (command index, response type,
data transfer mode... and even a string for debugging).
The controller just converts this into register values
and just executes the commands.
Next, the controller drivers shouldnt snoop on the
commands and then try to apply bus and frequency
switching on their own. This is now made explicit by
having SDio.bus(io, width, speed) function.
|
|
remove the global sdio struct and add a addmmcio() function
for drivers to register their controllers.
there is a SDio.aux pointer now where controller drivers
can stash a pointer to their private data.
SDio.init() also can signal that it wants to be called
again for more controllers by returning > 0 (see pc/pmmc.c).
this is in preparation for supporting the internal mmc
device in the mnt-reform which is hooked up to usdhc1.
|
|
The new pci code is moved to port/pci.[hc] and shared by
all ports.
Each port has its own PCI controller implementation,
providing the pcicfgrw*() functions for low level pci
config space access. The locking for pcicfgrw*() is now
done by the caller (only port/pci.c).
Device drivers now need to include "../port/pci.h" in
addition to "io.h".
The new code now checks bridge windows and membars,
while enumerating the bus, giving the pc driver a chance
to re-assign them. This is needed because some UEFI
implementations fail to assign the bars for some devices,
so we need to do it outselfs. (See pcireservemem()).
While working on this, it was discovered that the pci
code assimed the smallest I/O bar size is 16 (pcibarsize()),
which is wrong. I/O bars can be as small as 4 bytes.
Bit 1 in an I/O bar is also reserved and should be masked off,
making the port mask: port = bar & ~3;
|
|
|
|
|
|
|
|
|
|
|
|
make sure that the wakeup enable conditions
are seen by different processors before sleep
is called.
the problems havnt been observed so far.
|
|
|
|
the driver should work for standard sdhc
(see http://www.sdcard.org/) controllers,
but matches for the ricoh controller only
as it was the only one i have for testing.
|
