Age | Commit message (Collapse) | Author |
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This makes vmap()/vunmap() take a vlong size argument,
and change the type of Pci.mem[].size to vlong as well.
Even if vmap() wont support large mappings, it is nice to
get the original unruncated value for error checking.
pc64 needs a bigger VMAP window, as system76 pangolin
puts the framebuffer at a physical address > 512GB.
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resetlck
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The new pci code is moved to port/pci.[hc] and shared by
all ports.
Each port has its own PCI controller implementation,
providing the pcicfgrw*() functions for low level pci
config space access. The locking for pcicfgrw*() is now
done by the caller (only port/pci.c).
Device drivers now need to include "../port/pci.h" in
addition to "io.h".
The new code now checks bridge windows and membars,
while enumerating the bus, giving the pc driver a chance
to re-assign them. This is needed because some UEFI
implementations fail to assign the bars for some devices,
so we need to do it outselfs. (See pcireservemem()).
While working on this, it was discovered that the pci
code assimed the smallest I/O bar size is 16 (pcibarsize()),
which is wrong. I/O bars can be as small as 4 bytes.
Bit 1 in an I/O bar is also reserved and should be masked off,
making the port mask: port = bar & ~3;
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the only architecture dependence of devether was enabling interrupts,
which is now done at the end of the driver's reset() function now.
the wifi stack and dummy ethersink also go to port/.
do the IRQ2->IRQ9 hack for pc kernels in intrenabale(), so not
every caller of intrenable() has to be aware of it.
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386...
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controllers and printing
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ftrvxmtrx repots devices that use the endpoint number for
input and output of different types like:
nusb/ether: parsedesc endpoint 5[7] 07 05 81 03 08 00 09 # ep1 in intr
nusb/ether: parsedesc endpoint 5[7] 07 05 82 02 00 02 00
nusb/ether: parsedesc endpoint 5[7] 07 05 01 02 00 02 00 # ep1 out bulk
the previous change tried to work arround this but had the
concequence that only the lastly defined endpoint was
usable.
this change addresses the issue by allowing up to 32 endpoints
per device (16 output + 16 input endpoints) in devusb. the
hci driver will ignore the 4th bit and will only use the
lower 4 bits as endpoint address when talking to the usb
device.
when we encounter a conflict, we map the input endpoint
to the upper id range 16..31 and the output endpoint
to id 0..15 so two distinct endpoints are created.
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moved devusb to port, shifting the responsibility of how
to enable interrupts to the arch specific hci driver.
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regarding the ohci spec, a overrun td might supply a full
packet of data. this change seemed to have caused nusb/kb to
fail with getting spurious zero byte reads. reverting for now.
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implement SMM emulation driver handover in ohcireset(). this fixes
hang and defunct internal keyboard problems on a acer notebook.
dont spin forever waiting for the controller on soft reset in init().
check both, donehead pointer *and* interrupt status for
processed td event (Wdh) similar to the ohci spec example for
processed tds and unlink immidiately. acknowledge *all* the
interrupt status bits before masking. mask out unhandled
events.
various stuff:
check for christmas light interrupt status (cardbus controller
removed?)
add (missing?) break for Tddataovr error case in qhinterrupt().
(changed on sources, not clear why?)
mask interrupt events on shutdown() (from sources).
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sometimes, the bios does not assign a interrupt line for pci
devices. this should not be fatal in case of mp ineterrupts
as long as there is intpin or msi can be used.
warn in intrenable() if we hit such a interrupt and set
irq to -1 to prevent it from getting enabled on the pic
or as isa interrupt in apic mode.
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