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we keep the details about palloc in page.c, providing pagechaindone()
for mmu code to be called after a series of pagechainhead() calls.
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all the mmu code uses ulong, so get rid of the typeded.
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work with it
map the whole ocm memory on boot so we can translate physical to
virtual addresses and back for uncached memory using KADDR() and
PADDR().
replace ualloc() with ucalloc() returning virtual address. physical
address can be acquired with PADDR() now.
as ocm is now always mapped, use KADDR() instead of tmpmap() for
mp bootstrap.
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there are no kernels currently that do page coloring,
so the only use of cachectl[] is flushing the icache
(on arm and ppc).
on pc64, cachectl consumes 32 bytes in each page resulting
in over 200 megabytes of overhead for 32gb of ram with 4K
pages.
this change removes cachectl[] and adds txtflush ulong
that is set to ~0 by pio() to instruct putmmu() to flush
the icache.
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implement multiprocessor support.
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tmpunmap(), splhi() in l2free()
we have to call tmpmap() with interrupts disabled as the map
is a per cpu and a interrupt can preempt us while we where
commited to use a entry but *before* we wrote it!
tmpunmap() already calls coherence() before flushpg() so it
is not needed after tmpunmap().
splhi() in l2free() isnt needed as l2free() is always called
with interrupts disabled from mmuswitch() and mmurelease().
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