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code assumed struct was aligned to atleast LONG.
For packed structs we need to copy the reaminder as well.
Repro:
typedef struct {
char a;
char b;
short c;
short d;
char e;
char f;
char g;
char h;
} A;
void
main(int argc, char **argv)
{
A a1, a2;
a2.a = 1;
a2.b = 2;
a2.c = 3;
a2.d = 4;
a2.e = 5;
a2.f = 6;
a2.g = 7;
a2.h = 8;
a1 = a2;
print("%d %d %d %d %d %d %d %d\n", a1.a, a1.b, a1.c, a1.d, a1.e, a1.f, a1.g, a1.h);
}
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the peephole optimizer would remove stores to extern
register before a return statement as it would think
they are only set, but not used.
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The change to "assignment not used" breaks symmetry with
"used and not set" and removes the reference to the
specific warning mentioned in /sys/doc/comp.ms.
Also, the patch was half-assed as that it left some typos
in like "used an not set", which this change also fixed.
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result of OAS*, OPREINC, OPOSTINC
The expression value of the assignment operation was
returned implicitely by relying on regalloc() on the
right hand side "nod" borrowing the register from nn.
But this only works if nn is a register.
In case of 6c, it can also be a ONAME from a .safe
rathole returned by regsalloc().
This change adds explicit gmove() calls to assign the
expression value. Note that gmove() checks if source
and destination are the same register so it wont emit
redundant move operations in the common case.
The same is applied also to OPREINC and OPOSTINC operations.
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not what I wanted to commit.
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the results of the time calculation were garbled -- and
apparently negative on my system when testing, so the
test passed when it shouldn't have.
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for floating point operations, reuse the return register
on the right hand side if it has higher complex number
than the left hand side to conserve registers.
this makes the following code compile, that was previously
run out of floating point register:
float
f(float r[15])
{
return (r[0] + (r[1] * (r[2] + r[3] * (r[4] + r[5] * (r[6] + r[7] * (r[8] + r[9] * (r[10] + r[11] * (r[12] + r[13] * r[14]))))))));
}
the downside is that this produces extra move operations.
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for gethunk() to work, all allocators have to use it,
including allocations done by libc thru malloc(),
so the fake allocation functions are mandatory for
everyone.
to avoid duplication the code is moved to cc/compat
and prototypes provided in new cc/compat.h header.
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when a operation receives a chain of OINDEX nodes as its operands,
each indexing step used to allocate a new index register. this
is wastefull an can result in running out of fixed registers on 386
for code such as: x = a[a[a[a[i]]]].
instead we attempt to reuse the destination register of the operation
as the index register if it is not otherwise referenced. this results
in the index chain to use a single register for index and result and
leaves registers free to be used for something usefull instead.
for 6c, try to avoid R13 as well as BP index base register.
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implicit casts would cause spurious "result of operation not used"
warnings such as ape's stdio putc() macro.
make (void) casts non-ops when the casted expression has no
side effects. this avoid spurious warning with ape's assert()
macro.
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computed at compile time
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allocating AX,CX,DX last improves 64-bit multiplication-add
chains like a*b + c*d as the multiplication does not need to save
and restore AX and DX registers in most cases. reserving CX for
shifts also helps.
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instructions in peephole pass
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optimizers
introduce rolor() function to subsitute (a << c) | (a >> (bits(a) - c))
with (a <<< c) where <<< is cyclic rotation and c is constant.
this almost doubles the speed of chacha encryption of 386 and amd64.
the peephole optimizer used to stop when it hit a shift or rol
instruction when attempting to eleminate moves by register
substitution. but we do not have to as long as the shift count
operand is not CX (which cannot be substituted) and CX is not
a subject for substitution.
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- cover more cases that have no side effects
- ensure function has complex FNX
- pull operators out of OFUNC level
- rewrite OSTRUCT lhs to avoid all side-effects, use regalloc() instead of regret()
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fixed<->float conversions work correctly
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eleminate MOVLQXZ instructions after MOVL as MOVL implicitely
zero extends the result.
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convert:
x = B || W
MOVxLZX a, r; MOVxQZX r, b -> MOVxQZX a, r; MOVQ r, b
MOVxLSX a, r; MOVxQSX r, r -> MOVxQSX a, r; MOVQ r, r
the MOVQ can then be eleminated by copy propagation.
improve subprop() by accepting other mov and lea
instructions as the source op.
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peephole pass
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Without an explicit signal for a truncation, copy propagation will
sometimes propagate a 32-bit truncation and end up overwriting uses of
the original 64-bit value.
This was independently discovered and fixed in Go. See:
http://golang.org/issue/1315
https://codereview.appspot.com/6002043/
Thanks Charles Forsyth for tips and advice.
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the shift instructions does not change the zero flag
when the shift count is 0, so we cannot remove the
compare instruction in this case.
this fixes oggdec under 386.
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when the previous instruction sets the zero flag,
we can remove the CMPL/CMPQ instruction.
this removes compares for zero/non zero tests only.
it only looks at the previous non-nop instruction
to see if it sets our compare value register.
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1. Go group spotted that a slightly-obscured pointer move was done by AMOVL not AMOVQ.
2. Inspecting the code further, I noticed that other pointer types were set to TLONG not TIND,
causing similar truncation of pointers to 32 bits.
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to make it easy to use normal libraries (such as libdraw, libsec, and libmp)
with the kernel, which uses extern register, don't stray into the external
register set when allocating values to registers.
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