Age | Commit message (Collapse) | Author |
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allocating AX,CX,DX last improves 64-bit multiplication-add
chains like a*b + c*d as the multiplication does not need to save
and restore AX and DX registers in most cases. reserving CX for
shifts also helps.
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instructions in peephole pass
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optimizers
introduce rolor() function to subsitute (a << c) | (a >> (bits(a) - c))
with (a <<< c) where <<< is cyclic rotation and c is constant.
this almost doubles the speed of chacha encryption of 386 and amd64.
the peephole optimizer used to stop when it hit a shift or rol
instruction when attempting to eleminate moves by register
substitution. but we do not have to as long as the shift count
operand is not CX (which cannot be substituted) and CX is not
a subject for substitution.
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- cover more cases that have no side effects
- ensure function has complex FNX
- pull operators out of OFUNC level
- rewrite OSTRUCT lhs to avoid all side-effects, use regalloc() instead of regret()
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fixed<->float conversions work correctly
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eleminate MOVLQXZ instructions after MOVL as MOVL implicitely
zero extends the result.
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convert:
x = B || W
MOVxLZX a, r; MOVxQZX r, b -> MOVxQZX a, r; MOVQ r, b
MOVxLSX a, r; MOVxQSX r, r -> MOVxQSX a, r; MOVQ r, r
the MOVQ can then be eleminated by copy propagation.
improve subprop() by accepting other mov and lea
instructions as the source op.
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peephole pass
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Without an explicit signal for a truncation, copy propagation will
sometimes propagate a 32-bit truncation and end up overwriting uses of
the original 64-bit value.
This was independently discovered and fixed in Go. See:
http://golang.org/issue/1315
https://codereview.appspot.com/6002043/
Thanks Charles Forsyth for tips and advice.
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the shift instructions does not change the zero flag
when the shift count is 0, so we cannot remove the
compare instruction in this case.
this fixes oggdec under 386.
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when the previous instruction sets the zero flag,
we can remove the CMPL/CMPQ instruction.
this removes compares for zero/non zero tests only.
it only looks at the previous non-nop instruction
to see if it sets our compare value register.
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1. Go group spotted that a slightly-obscured pointer move was done by AMOVL not AMOVQ.
2. Inspecting the code further, I noticed that other pointer types were set to TLONG not TIND,
causing similar truncation of pointers to 32 bits.
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to make it easy to use normal libraries (such as libdraw, libsec, and libmp)
with the kernel, which uses extern register, don't stray into the external
register set when allocating values to registers.
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