From c2b8bb8eec79c9f3537bbdeab50154a299165d09 Mon Sep 17 00:00:00 2001 From: cinap_lenrek Date: Sun, 21 Aug 2022 23:08:07 +0000 Subject: imx8: 1.5Ghz turbo --- sys/src/9/imx8/ccm.c | 2 +- sys/src/9/imx8/clock.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/src/9/imx8/ccm.c b/sys/src/9/imx8/ccm.c index f0a529fcc..21fc8934d 100644 --- a/sys/src/9/imx8/ccm.c +++ b/sys/src/9/imx8/ccm.c @@ -146,7 +146,7 @@ enum { }; static int input_clk_freq[] = { - [ARM_PLL_CLK] 1600*Mhz, + [ARM_PLL_CLK] 1500*Mhz, [GPU_PLL_CLK] 1600*Mhz, [VPU_PLL_CLK] 800*Mhz, [DRAM_PLL1_CLK] 800*Mhz, diff --git a/sys/src/9/imx8/clock.c b/sys/src/9/imx8/clock.c index 5148176e7..37694790f 100644 --- a/sys/src/9/imx8/clock.c +++ b/sys/src/9/imx8/clock.c @@ -46,7 +46,7 @@ clockinit(void) /* TURBO! */ setclkrate("ccm_arm_a53_clk_root", "osc_25m_ref_clk", 25*Mhz); - setclkrate("ccm_arm_a53_clk_root", "arm_pll_clk", 1400*Mhz); + setclkrate("ccm_arm_a53_clk_root", "arm_pll_clk", 1500*Mhz); } tstart = sysrd(CNTPCT_EL0); do{ -- cgit v1.2.3