From 4f85115526a87063489dc7cf347343bd520159b1 Mon Sep 17 00:00:00 2001 From: cinap_lenrek Date: Sun, 13 Sep 2020 20:33:17 +0200 Subject: kernel: massive pci code rewrite The new pci code is moved to port/pci.[hc] and shared by all ports. Each port has its own PCI controller implementation, providing the pcicfgrw*() functions for low level pci config space access. The locking for pcicfgrw*() is now done by the caller (only port/pci.c). Device drivers now need to include "../port/pci.h" in addition to "io.h". The new code now checks bridge windows and membars, while enumerating the bus, giving the pc driver a chance to re-assign them. This is needed because some UEFI implementations fail to assign the bars for some devices, so we need to do it outselfs. (See pcireservemem()). While working on this, it was discovered that the pci code assimed the smallest I/O bar size is 16 (pcibarsize()), which is wrong. I/O bars can be as small as 4 bytes. Bit 1 in an I/O bar is also reserved and should be masked off, making the port mask: port = bar & ~3; --- sys/src/9/pc/uartaxp.c | 1 + 1 file changed, 1 insertion(+) (limited to 'sys/src/9/pc/uartaxp.c') diff --git a/sys/src/9/pc/uartaxp.c b/sys/src/9/pc/uartaxp.c index 2b84f6a30..48a26b3f6 100644 --- a/sys/src/9/pc/uartaxp.c +++ b/sys/src/9/pc/uartaxp.c @@ -7,6 +7,7 @@ #include "dat.h" #include "fns.h" #include "io.h" +#include "../port/pci.h" #include "../port/error.h" #include "uartaxp.i" -- cgit v1.2.3