1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
|
/*
* operations on all memory data or unified caches, a no-op cache,
* and an l1-only cache ops cache.
* i-caches are not handled here.
*
* there are only three cache operations that we care about:
* force cache contents to memory (before dma out or shutdown),
* ignore cache contents in favour of memory (initialisation, after dma in),
* both (update page tables and force cpu to read new contents).
*/
#include "u.h"
#include "../port/lib.h"
#include "mem.h"
#include "dat.h"
#include "fns.h"
#include "io.h"
#include "../port/error.h"
static Cacheimpl allcaches, nullcaches, l1caches;
void
cachesinfo(Memcache *cp)
{
memset(cp, 0, sizeof *cp);
cp->setsways = Cara | Cawa | Cawt | Cawb;
cp->l1ip = 3<<14; /* PIPT */
cp->log2linelen = log2(CACHELINESZ);
}
void
allcacheson(void)
{
l2pl310init();
allcache = &allcaches;
nocache = &nullcaches;
l1cache = &l1caches;
}
void
cachesoff(void)
{
l2cache->off();
}
void
cachesinvse(void *va, int bytes)
{
int s;
s = splhi();
l2cache->invse(va, bytes);
cachedinvse(va, bytes);
splx(s);
}
void
cacheswbse(void *va, int bytes)
{
int s;
s = splhi();
cachedwbse(va, bytes);
l2cache->wbse(va, bytes);
splx(s);
}
void
cacheswbinvse(void *va, int bytes)
{
int s;
s = splhi();
cachedwbse(va, bytes);
l2cache->wbinvse(va, bytes);
cachedwbinvse(va, bytes);
splx(s);
}
void
cachesinv(void)
{
int s;
s = splhi();
l2cache->inv();
cachedinv();
splx(s);
}
void
cacheswb(void)
{
int s;
s = splhi();
cachedwb();
l2cache->wb();
splx(s);
}
void
cacheswbinv(void)
{
int s;
s = splhi();
cachedwb();
l2cache->wbinv();
cachedwbinv();
splx(s);
}
static Cacheimpl allcaches = {
.info = cachesinfo,
.on = allcacheson,
.off = cachesoff,
.inv = cachesinv,
.wb = cacheswb,
.wbinv = cacheswbinv,
.invse = cachesinvse,
.wbse = cacheswbse,
.wbinvse= cacheswbinvse,
};
/*
* null cache ops
*/
void
nullinfo(Memcache *cp)
{
memset(cp, 0, sizeof *cp);
cp->log2linelen = 2;
}
void
nullon(void)
{
nocache = &nullcaches;
}
void
nullop(void)
{
}
void
nullse(void *, int)
{
}
static Cacheimpl nullcaches = {
.info = nullinfo,
.on = nullon,
.off = nullop,
.inv = nullop,
.wb = nullop,
.wbinv = nullop,
.invse = nullse,
.wbse = nullse,
.wbinvse= nullse,
};
/*
* l1-only ops
*/
void
l1cachesinfo(Memcache *)
{
}
void
l1cacheson(void)
{
l1cache = &l1caches;
}
static Cacheimpl l1caches = {
.info = l1cachesinfo,
.on = l1cacheson,
.off = nullop,
.inv = cachedinv,
.wb = cachedwb,
.wbinv = cachedwbinv,
.invse = cachedinvse,
.wbse = cachedwbse,
.wbinvse= cachedwbinvse,
};
|
