summaryrefslogtreecommitdiff
path: root/sys/src/cmd/qi/run.c
blob: ea376b956cf53f226f96e8f627ae002e251b5449 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
#include <u.h>
#include <libc.h>
#include <bio.h>
#include <mach.h>
#define Extern extern
#include "power.h"


void	lfs(ulong);
void	lfd(ulong);
void	stfs(ulong);
void	stfd(ulong);
/* indexed versions are in 31 */

void	addic(ulong);
void	addiccc(ulong);
void	addi(ulong);
void	addis(ulong);
void	andicc(ulong);
void	andiscc(ulong);
void	bcx(ulong);
void	bx(ulong);
void	cmpi(ulong);
void	cmpli(ulong);
void	lbz(ulong);
void	lha(ulong);
void	lhz(ulong);
void	lmw(ulong);
void	lwz(ulong);
void	mulli(ulong);
void	ori(ulong);
void	oris(ulong);
void	rlwimi(ulong);
void	rlwinm(ulong);
void	rlwnm(ulong);
void	sc(ulong);
void	stb(ulong);
void	sth(ulong);
void	stmw(ulong);
void	stw(ulong);
void	subfic(ulong);
void	twi(ulong);
void	xori(ulong);
void	xoris(ulong);

Inst	op0[] = {
[3] {twi, "twi", Ibranch},
[7] {mulli, "mulli", Iarith},
[8] {subfic, "subfic", Iarith},
[10] {cmpli, "cmpli", Iarith},
[11] {cmpi, "cmpi", Iarith},
[12] {addic, "addic", Iarith},
[13] {addiccc, "addic.", Iarith},
[14] {addi, "addi", Iarith},
[15] {addis, "addis", Iarith},
[16] {bcx, "bc⋯", Ibranch},
[17] {sc, "sc", Isyscall},
[18] {bx, "b⋯", Ibranch},
/* group 19; branch unit */
[20] {rlwimi, "rlwimi", Ilog},
[21] {rlwinm, "rlwinm", Ilog},
[23] {rlwnm, "rlwnm", Ilog},
[24] {ori, "ori", Ilog},
[25] {oris, "oris", Ilog},
[26] {xori, "xori", Ilog},
[27] {xoris, "xoris", Ilog},
[28] {andicc, "andi.", Ilog},
[29] {andiscc, "andis.", Ilog},
/* group 31; integer & misc. */
[32] {lwz, "lwz", Iload},
[33] {lwz, "lwzu", Iload},
[34] {lbz, "lbz", Iload},
[35] {lbz, "lbzu", Iload},
[36] {stw, "stw", Istore},
[37] {stw, "stwu", Istore},
[38] {stb, "stb", Istore},
[39] {stb, "stbu", Istore},
[40] {lhz, "lhz", Iload},
[41] {lhz, "lhzu", Iload},
[42] {lha, "lha", Iload},
[43] {lha, "lhau", Iload},
[44] {sth, "sth", Istore},
[45] {sth, "sthu", Istore},
[46] {lmw, "lmw", Iload},
[47] {stmw, "stmw", Istore},
[48] {lfs, "lfs", Iload},
[49] {lfs, "lfsu", Iload},
[50] {lfd, "lfd", Iload},
[51] {lfd, "lfdu", Iload},
[52] {stfs, "stfs", Istore},
[53] {stfs, "stfsu", Istore},
[54] {stfd, "stfd", Istore},
[55] {stfd, "stfdu", Istore},
/* group 59; single precision floating point */
/* group 63; double precision floating point; fpscr */
	{0, 0, 0},
};

Inset	ops0 = {op0, nelem(op0)-1};

static	char	oemflag[] = {
	[104] 1,
	[10] 1,
	[136] 1,
	[138] 1,
	[200] 1,
	[202] 1,
	[232] 1,
	[234] 1,
	[235] 1,
	[266] 1,
	[40] 1,
	[459] 1,
	[491] 1,
	[8] 1,
};


void
run(void)
{
	int xo, f;

	do {
		reg.ir = ifetch(reg.pc);
		ci = 0;
		switch(reg.ir>>26) {
		default:
			xo = reg.ir>>26;
			if(xo >= nelem(op0))
				break;
			ci = &op0[xo];
			break;
		case 19:
			xo = getxo(reg.ir);
			if(xo >= ops19.nel)
				break;
			ci = &ops19.tab[xo];
			break;
		case 31:
			xo = getxo(reg.ir);
			f = xo & ~getxo(OE);
			if(reg.ir&OE && f < sizeof(oemflag) && oemflag[f])
				xo = f;
			if(xo >= ops31.nel)
				break;
			ci = &ops31.tab[xo];
			break;
		case 59:
			xo = getxo(reg.ir) & 0x1F;
			if(xo >= ops59.nel)
				break;
			ci = &ops59.tab[xo];
			break;
		case 63:
			xo = getxo(reg.ir) & 0x1F;
			if(xo < ops63a.nel) {
				ci = &ops63a.tab[xo];
				if(ci->func || ci->name)
					break;
				ci = 0;
			}
			xo = getxo(reg.ir);
			if(xo >= ops63b.nel)
				break;
			ci = &ops63b.tab[xo];
			break;
		}
		if(ci && ci->func){
			ci->count++;
			(*ci->func)(reg.ir);
		} else {
			if(ci && ci->name && trace)
				itrace("%s\t[not yet done]", ci->name);
			else
				undef(reg.ir);
		}
		reg.pc += 4;
		if(bplist)
			brkchk(reg.pc, Instruction);
	}while(--count);
}

void
ilock(int)
{
}

void
undef(ulong ir)
{
/*	Bprint(bioout, "op=%d op2=%d op3=%d\n", ir>>30, (ir>>21)&0x7, (ir>>19)&0x3f); */
	Bprint(bioout, "illegal_instruction IR #%.8lux (op=%ld/%ld, pc=#%.8lux)\n", ir, getop(ir), getxo(ir), reg.pc);
	if(ci && ci->name && ci->func==0)
		Bprint(bioout, "(%s not yet implemented)\n", ci->name);
	longjmp(errjmp, 0);
}

void
unimp(ulong ir)
{
/*	Bprint(bioout, "op=%d op2=%d op3=%d\n", ir>>30, (ir>>21)&0x7, (ir>>19)&0x3f); */
	Bprint(bioout, "illegal_instruction IR #%.8lux (op=%ld/%ld, pc=#%.8lux) %s not in MPC601\n", ir, getop(ir), getxo(ir), reg.pc, ci->name?ci->name: "-");
	longjmp(errjmp, 0);
}