pc/vga*: use 64-bit physical addresses and check pci membar types and sizes

16 files changed, 70 insertions, 40 deletions

diff --git a/sys/src/9/pc/vga3dfx.c b/sys/src/9/pc/vga3dfx.c
index 1b4420c6b..214adfbca 100644
--- a/sys/src/9/pc/vga3dfx.c
+++ b/sys/src/9/pc/vga3dfx.c
@@ -37,8 +37,9 @@ tdfxenable(VGAscr* scr)
 	if(scr->mmio)
 		return;
 	p = scr->pci;
-	if(p == nil || p->vid != 0x121A)
+	if(p == nil || p->vid != 0x121A || (p->mem[0].bar & 1) != 0)
 		return;
+
 	scr->mmio = vmap(p->mem[0].bar&~0x0F, p->mem[0].size);
 	if(scr->mmio == nil)
 		return;
diff --git a/sys/src/9/pc/vgaclgd546x.c b/sys/src/9/pc/vgaclgd546x.c
index 5713d9ee9..e31ed432c 100644
--- a/sys/src/9/pc/vgaclgd546x.c
+++ b/sys/src/9/pc/vgaclgd546x.c
@@ -42,8 +42,10 @@ clgd546xenable(VGAscr* scr)
 	p = scr->pci;
 	if(p == nil)
 		return;
+	if(p->mem[1].bar & 1)
+		return;
 	scr->mmio = vmap(p->mem[1].bar&~0x0F, p->mem[1].size);
-	if(scr->mmio == 0)
+	if(scr->mmio == nil)
 		return;
 	addvgaseg("clgd546xmmio", p->mem[1].bar&~0x0F, p->mem[1].size);
 }
@@ -53,7 +55,7 @@ clgd546xcurdisable(VGAscr* scr)
 {
 	Cursor546x *cursor546x;
 
-	if(scr->mmio == 0)
+	if(scr->mmio == nil)
 		return;
 	cursor546x = (Cursor546x*)((uchar*)scr->mmio+CursorMMIO);
 	cursor546x->enable = 0;
diff --git a/sys/src/9/pc/vgacyber938x.c b/sys/src/9/pc/vgacyber938x.c
index 3df93896c..4678680dc 100644
--- a/sys/src/9/pc/vgacyber938x.c
+++ b/sys/src/9/pc/vgacyber938x.c
@@ -56,7 +56,7 @@ cyber938xlinear(VGAscr* scr, int, int)
 	 * Heuristic to detect the MMIO space.  We're flying blind
 	 * here, with only the XFree86 source to guide us.
 	 */
-	if(p->mem[1].size == 0x20000)
+	if(p->mem[1].size == 0x20000 && (p->mem[1].bar & 1) == 0)
 		scr->mmio = vmap(p->mem[1].bar & ~0x0F, p->mem[1].size);
 
 	if(scr->apsize)
diff --git a/sys/src/9/pc/vgageode.c b/sys/src/9/pc/vgageode.c
index eee9fd919..0fe7890b5 100644
--- a/sys/src/9/pc/vgageode.c
+++ b/sys/src/9/pc/vgageode.c
@@ -32,9 +32,13 @@ geodeenable(VGAscr* scr)
 	if(scr->mmio)
 		return;
 	p = scr->pci;
-	if(!p) return;
+	if(p == nil)
+		return;
+	if((p->mem[1].bar | p->mem[2].bar | p->mem[3].bar) & 1)
+		return;
 	scr->mmio = vmap(p->mem[2].bar&~0x0F, p->mem[2].size);
-	if(!scr->mmio) return;
+	if(scr->mmio == nil)
+		return;
 	addvgaseg("geodegp", p->mem[1].bar&~0x0F, p->mem[1].size);
 	addvgaseg("geodemmio", p->mem[2].bar&~0x0F, p->mem[2].size);
 	addvgaseg("geodevid", p->mem[3].bar&~0x0F, p->mem[3].size);
diff --git a/sys/src/9/pc/vgai81x.c b/sys/src/9/pc/vgai81x.c
index f0e6ae933..1827aceac 100644
--- a/sys/src/9/pc/vgai81x.c
+++ b/sys/src/9/pc/vgai81x.c
@@ -55,15 +55,19 @@ i81xenable(VGAscr* scr)
 {
 	Pcidev *p;
 	int size;
-	ulong *pgtbl, *rp, fbuf, fbend;
+	ulong *pgtbl, *rp;
+	uintptr fbuf, fbend;
 	
 	if(scr->mmio)
 		return;
 	p = scr->pci;
 	if(p == nil)
 		return;
+	if((p->mem[0].bar & 1) != 0
+	|| (p->mem[1].bar & 1) != 0)
+		return;
 	scr->mmio = vmap(p->mem[1].bar & ~0x0F, p->mem[1].size);
-	if(scr->mmio == 0)
+	if(scr->mmio == nil)
 		return;
 	addvgaseg("i81xmmio", p->mem[1].bar&~0x0F, p->mem[1].size);
 
diff --git a/sys/src/9/pc/vgaigfx.c b/sys/src/9/pc/vgaigfx.c
index 34bc424e2..6ad761b9b 100644
--- a/sys/src/9/pc/vgaigfx.c
+++ b/sys/src/9/pc/vgaigfx.c
@@ -42,6 +42,8 @@ igfxenable(VGAscr* scr)
 	p = scr->pci;
 	if(p == nil)
 		return;
+	if(p->mem[0].bar & 1)
+		return;
 	scr->mmio = vmap(p->mem[0].bar&~0x0F, p->mem[0].size);
 	if(scr->mmio == nil)
 		return;
diff --git a/sys/src/9/pc/vgamach64xx.c b/sys/src/9/pc/vgamach64xx.c
index f05dbabd8..0f6ea6c10 100644
--- a/sys/src/9/pc/vgamach64xx.c
+++ b/sys/src/9/pc/vgamach64xx.c
@@ -174,7 +174,6 @@ mach64xxenable(VGAscr* scr)
 		 * this will do for now.
 		 */
 		scr->io = p->mem[1].bar & ~0x03;
-
 		if(scr->io == 0)
 			scr->io = 0x2EC;
 	}
@@ -1068,7 +1067,7 @@ ovl_status(VGAscr *scr, Chan *, char **field)
 		   mach64type->m64_ovlclock,
 		   mach64revb? "yes": "no",
 		   mach64refclock);
-	pprint("%s: storage @%.8luX, aperture @%8.ulX, ovl buf @%.8ulX\n",
+	pprint("%s: storage @%.8luX, aperture @%8.ullX, ovl buf @%.8ulX\n",
 		   scr->dev->name, scr->storage, scr->paddr,
 		   mach64overlay);
 }
diff --git a/sys/src/9/pc/vgamga2164w.c b/sys/src/9/pc/vgamga2164w.c
index ce4580cb2..3269cd7a5 100644
--- a/sys/src/9/pc/vgamga2164w.c
+++ b/sys/src/9/pc/vgamga2164w.c
@@ -40,6 +40,10 @@ mga2164wenable(VGAscr* scr)
 	if(p == nil || p->vid != MATROX)
 		return;
 
+	if((p->mem[0].bar & 1) != 0
+	|| (p->mem[1].bar & 1) != 0)
+		return;
+
 	if(p->did == MGA2064){
 		scr->mmio = vmap(p->mem[0].bar&~0x0F, p->mem[0].size);
 		if(scr->mmio == nil)
diff --git a/sys/src/9/pc/vgamga4xx.c b/sys/src/9/pc/vgamga4xx.c
index 0bc8019ab..d29d3cfdc 100644
--- a/sys/src/9/pc/vgamga4xx.c
+++ b/sys/src/9/pc/vgamga4xx.c
@@ -119,17 +119,22 @@ mga4xxenable(VGAscr* scr)
 	if(pci == nil)
 		return;
 
+	/* need to map frame buffer here too, so vga can find memory size */
+	if(pci->did == MGA4xx || pci->did == MGA550)
+		size = 32*MB;
+	else
+		size = 8*MB;
+
+	if((pci->mem[0].bar & 1) != 0 || pci->mem[0].size < size
+	|| (pci->mem[1].bar & 1) != 0 || pci->mem[1].size < 16*1024)
+		return;
+
 	scr->mmio = vmap(pci->mem[1].bar&~0x0F, 16*1024);
 	if(scr->mmio == nil)
 		return;
 	
 	addvgaseg("mga4xxmmio", pci->mem[1].bar&~0x0F, pci->mem[1].size);
 
-	/* need to map frame buffer here too, so vga can find memory size */
-	if(pci->did == MGA4xx || pci->did == MGA550)
-		size = 32*MB;
-	else
-		size = 8*MB;
 	vgalinearaddr(scr, pci->mem[0].bar&~0x0F, size);
 
 	if(scr->paddr){
diff --git a/sys/src/9/pc/vganeomagic.c b/sys/src/9/pc/vganeomagic.c
index 0dbc6e104..b1bd3f84c 100644
--- a/sys/src/9/pc/vganeomagic.c
+++ b/sys/src/9/pc/vganeomagic.c
@@ -26,8 +26,8 @@ static void
 neomagicenable(VGAscr* scr)
 {
 	Pcidev *p;
-	int curoff, vmsize;
-	ulong ioaddr;
+	int bar, curoff, vmsize;
+	uvlong ioaddr;
 	ulong iosize;
 
 	/*
@@ -42,48 +42,46 @@ neomagicenable(VGAscr* scr)
 	p = scr->pci;
 	if(p == nil || p->vid != 0x10C8)
 		return;
+	bar = 1;
 	switch(p->did){
 	case 0x0003:		/* MagicGraph 128ZV */
+		bar = 0;
+		if(p->mem[bar].bar & 1)
+			return;
+		ioaddr = (p->mem[bar].bar & ~0x0F) + 0x200000;
+		iosize = 0x200000;
 		curoff = 0x100;
 		vmsize = 1152*1024;
-		ioaddr = (p->mem[0].bar & ~0x0F) + 0x200000;
-		iosize = 0x200000;
-		break;
+		goto Map;
 	case 0x0083:		/* MagicGraph 128ZV+ */
 		curoff = 0x100;
 		vmsize = 1152*1024;
-		ioaddr = p->mem[1].bar & ~0x0F;
-		iosize = p->mem[1].size;
 		break;
 	case 0x0004:		/* MagicGraph 128XD */
 		curoff = 0x100;
 		vmsize = 2048*1024;
-		ioaddr = p->mem[1].bar & ~0x0F;
-		iosize = p->mem[1].size;
 		break;
 	case 0x0005:		/* MagicMedia 256AV */
 		curoff = 0x1000;
 		vmsize = 2560*1024;
-		ioaddr = p->mem[1].bar & ~0x0F;
-		iosize = p->mem[1].size;
 		break;
 	case 0x0006:		/* MagicMedia 256ZX */
 		curoff = 0x1000;
 		vmsize = 4096*1024;
-		ioaddr = p->mem[1].bar & ~0x0F;
-		iosize = p->mem[1].size;
 		break;
 	case 0x0016:		/* MagicMedia 256XL+ */
 		curoff = 0x1000;
 		/* Vaio VESA BIOS says 6080, but then hwgc doesn't work */
 		vmsize = 4096*1024;
-		ioaddr = p->mem[1].bar & ~0x0F;
-		iosize = p->mem[1].size;
 		break;
 	default:
 		return;
 	}
-
+	if(p->mem[bar].bar & 1)
+		return;
+	ioaddr = p->mem[bar].bar & ~0x0F;
+	iosize = p->mem[bar].size;
+Map:
 	scr->mmio = vmap(ioaddr, iosize);
 	if(scr->mmio == nil)
 		return;
diff --git a/sys/src/9/pc/vganvidia.c b/sys/src/9/pc/vganvidia.c
index 71274c872..54de9dc6e 100644
--- a/sys/src/9/pc/vganvidia.c
+++ b/sys/src/9/pc/vganvidia.c
@@ -90,7 +90,8 @@ nvidiaenable(VGAscr* scr)
 	if(p == nil)
 		return;
 	scr->id = p->did;
-
+	if(p->mem[0].bar & 1)
+		return;
 	scr->mmio = vmap(p->mem[0].bar & ~0x0F, p->mem[0].size);
 	if(scr->mmio == nil)
 		return;
diff --git a/sys/src/9/pc/vgaradeon.c b/sys/src/9/pc/vgaradeon.c
index 7d4af0875..9430a1a6c 100644
--- a/sys/src/9/pc/vgaradeon.c
+++ b/sys/src/9/pc/vgaradeon.c
@@ -87,9 +87,10 @@ radeonenable(VGAscr *scr)
 	if (p == nil)
 		return;
 	scr->id = p->did;
-
+	if(p->mem[2].bar & 1)
+		return;
 	scr->mmio = vmap(p->mem[2].bar & ~0x0f, p->mem[2].size);
-	if(scr->mmio == 0)
+	if(scr->mmio == nil)
 		return;
 	addvgaseg("radeonmmio", p->mem[2].bar & ~0x0f, p->mem[2].size);
 
diff --git a/sys/src/9/pc/vgas3.c b/sys/src/9/pc/vgas3.c
index 95cd58f30..f055d8919 100644
--- a/sys/src/9/pc/vgas3.c
+++ b/sys/src/9/pc/vgas3.c
@@ -91,8 +91,9 @@ s3page(VGAscr* scr, int page)
 static void
 s3linear(VGAscr* scr, int, int)
 {
+	uvlong mmiobase;
+	ulong mmiosize;
 	int id, j;
-	ulong mmiobase, mmiosize;
 	Pcidev *p;
 	
 	p = scr->pci;
diff --git a/sys/src/9/pc/vgat2r4.c b/sys/src/9/pc/vgat2r4.c
index 4ef28042b..5cf282325 100644
--- a/sys/src/9/pc/vgat2r4.c
+++ b/sys/src/9/pc/vgat2r4.c
@@ -67,7 +67,8 @@ t2r4enable(VGAscr* scr)
 	p = scr->pci;
 	if(p == nil)
 		return;
-	
+	if(p->mem[4].bar & 1)
+		return;
 	mmio = vmap(p->mem[4].bar & ~0x0F, p->mem[4].size);
 	if(mmio == nil)
 		return;
diff --git a/sys/src/9/pc/vgavesa.c b/sys/src/9/pc/vgavesa.c
index dbe4d0024..3f7300326 100644
--- a/sys/src/9/pc/vgavesa.c
+++ b/sys/src/9/pc/vgavesa.c
@@ -161,9 +161,9 @@ vesalinear(VGAscr *scr, int, int)
 		if(pci->ccrb != Pcibcdisp)
 			continue;
 		for(i=0; i<nelem(pci->mem); i++){
-			ulong a, e;
+			uvlong a, e;
 
-			if(pci->mem[i].bar&1)	/* not memory */
+			if(pci->mem[i].size == 0 || (pci->mem[i].bar & 1) != 0)
 				continue;
 			a = pci->mem[i].bar & ~0xF;
 			e = a + pci->mem[i].size;
diff --git a/sys/src/9/pc/vgavmware.c b/sys/src/9/pc/vgavmware.c
index 710da156e..aa4b12e30 100644
--- a/sys/src/9/pc/vgavmware.c
+++ b/sys/src/9/pc/vgavmware.c
@@ -95,7 +95,7 @@ enum {
 
 typedef struct Vmware	Vmware;
 struct Vmware {
-	ulong	fb;
+	uvlong	fb;
 
 	ulong	ra;
 	ulong	rd;
@@ -142,6 +142,8 @@ vmwarelinear(VGAscr* scr, int, int)
 	p = scr->pci;
 	if(p == nil || p->vid != PCIVMWARE)
 		return;
+	if(p->mem[1].bar & 1)
+		return;
 	switch(p->did){
 	default:
 		return;
@@ -151,6 +153,8 @@ vmwarelinear(VGAscr* scr, int, int)
 		vm->rd = 0x4560 + 4;
 		break;
 	case VMWARE2:
+		if((p->mem[0].bar & 1) == 0)
+			return;
 		vm->ver = 2;
 		vm->ra = p->mem[0].bar & ~3;
 		vm->rd = vm->ra + 1;
@@ -164,8 +168,11 @@ vmwarelinear(VGAscr* scr, int, int)
 		addvgaseg("vmwarescreen", scr->paddr, scr->apsize);
 
 	if(scr->mmio==nil){
-		ulong mmiobase, mmiosize;
+		uvlong mmiobase;
+		ulong mmiosize;
 
+		if(p->mem[2].bar & 1)
+			return;
 		// mmiobase = vmrd(vm, Rmemstart);
 		mmiobase = p->mem[2].bar & ~0xF;
 		if(mmiobase == 0)