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authorcinap_lenrek <cinap_lenrek@felloff.net>2020-06-06 16:31:39 +0200
committercinap_lenrek <cinap_lenrek@felloff.net>2020-06-06 16:31:39 +0200
commit4c8d2b0ebf1fd3fe5b96e227da23a82f669a82fa (patch)
tree665166e668e28ad70426fcb68b3310cec19aa9c7
parent7db23bb2f00a9c8f53f7aa063112e946f7a9539a (diff)
devlml: use 64-bit physical addresses
-rw-r--r--sys/src/9/pc/devlml.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/sys/src/9/pc/devlml.c b/sys/src/9/pc/devlml.c
index f15542922..83c57b855 100644
--- a/sys/src/9/pc/devlml.c
+++ b/sys/src/9/pc/devlml.c
@@ -44,7 +44,7 @@ typedef struct LML LML;
struct LML {
/* Hardware */
Pcidev *pcidev;
- ulong pciBaseAddr;
+ uintptr pciBaseAddr;
/* Allocated memory */
CodeData *codedata;
@@ -132,7 +132,7 @@ prepbuf(LML *lml)
static void
lmlreset(void)
{
- ulong regpa;
+ uvlong regpa;
char name[32];
void *regva;
LML *lml;
@@ -170,8 +170,8 @@ lmlreset(void)
print("lml: failed to map registers\n");
return;
}
- lml->pciBaseAddr = (ulong)regva;
- print(", mapped at 0x%.8lux\n", lml->pciBaseAddr);
+ lml->pciBaseAddr = (uintptr)regva;
+ print(", mapped at %#p\n", lml->pciBaseAddr);
memset(&segbuf, 0, sizeof(segbuf));
segbuf.attr = SG_PHYSICAL;
@@ -188,7 +188,7 @@ lmlreset(void)
segbuf.attr = SG_PHYSICAL | SG_DEVICE | SG_NOEXEC;
sprint(name, "lml%d.regs", nlml);
kstrdup(&segbuf.name, name);
- segbuf.pa = (ulong)regpa;
+ segbuf.pa = (uintptr)regpa;
segbuf.size = pcidev->mem[0].size;
if(addphysseg(&segbuf) == nil){
print("lml: physsegment: %s\n", name);