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| author | Sigrid Solveig Haflínudóttir <sigrid@ftrv.se> | 2023-05-09 14:24:23 +0000 |
|---|---|---|
| committer | Sigrid Solveig Haflínudóttir <sigrid@ftrv.se> | 2023-05-09 14:24:23 +0000 |
| commit | 8aaecfe55f73a8c599fed1adbbba11a5e94dfc3c (patch) | |
| tree | 13bc7df1a83c3378847c608cd368ae1ad260c36e | |
| parent | 47165e1c2ccc0471349691cc92f64f81984b18c5 (diff) | |
7l: throw an error if CASE uses the same register for base and offset (CASE R1, R1)
| -rw-r--r-- | sys/src/cmd/7l/asmout.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sys/src/cmd/7l/asmout.c b/sys/src/cmd/7l/asmout.c index 52b59f253..2c4a98bd5 100644 --- a/sys/src/cmd/7l/asmout.c +++ b/sys/src/cmd/7l/asmout.c @@ -818,6 +818,8 @@ asmout(Prog *p, Optab *o) break; case 62: /* case Rv, Rt -> adr tab, Rt; movw Rt[R<<2], Rl; add Rt, Rl; br (Rl) */ + if(p->from.reg == p->to.reg) + diag("invalid SWITCH\n%P", p); o1 = ADR(0, 4*4, p->to.reg); /* adr 4(pc), Rt */ o2 = (2<<30)|(7<<27)|(2<<22)|(1<<21)|(3<<13)|(1<<12)|(2<<10)|(p->from.reg<<16)|(p->to.reg<<5)|REGTMP; /* movw Rt[Rv<<2], REGTMP */ o3 = oprrr(AADD) | (p->to.reg<<16) | (REGTMP<<5) | REGTMP; /* add Rt, REGTMP */ |