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authorcinap_lenrek <cinap_lenrek@gmx.de>2013-06-19 20:56:01 +0200
committercinap_lenrek <cinap_lenrek@gmx.de>2013-06-19 20:56:01 +0200
commit8da4c8dcde68ca1da9b131cfcea917e781abf768 (patch)
tree8e0a82f94646b093317cc66f73999ad30a2d887e
parent35314ce1e79a145c29ef83d2abdc823961b3653c (diff)
plan9.ini: add *notsc= option to disable use of TSC as righ resolution clock
we previously used tsc only on cpu kernel. now that we use it on terminal kernel too, there might be some surprises ahead. so make it possible to disable tsc for machines where the tsc rate is not kept constant across cores or is dynamically adjusted by power management.
-rw-r--r--sys/man/8/plan9.ini5
-rw-r--r--sys/src/9/pc/devarch.c2
2 files changed, 6 insertions, 1 deletions
diff --git a/sys/man/8/plan9.ini b/sys/man/8/plan9.ini
index 61115f7fd..48aab7f37 100644
--- a/sys/man/8/plan9.ini
+++ b/sys/man/8/plan9.ini
@@ -720,6 +720,11 @@ processors.
Prints a summary of the multiprocessor APIC interrupt configuration.
.SS \fL*nomsi=\fP
Disables message signaled interrupts.
+.SS \fL*notsc=\fP
+Disables the use of the per processor timestamp counter registers
+as high resolution clock. This option is intended for machines where
+the timestamp counter rate is not constant across cores or is adjusted
+dynamically by power management.
.SS \fL*pcimaxbno=value\fP
This puts a limit on the maximum bus number probed
on a PCI bus (default 7).
diff --git a/sys/src/9/pc/devarch.c b/sys/src/9/pc/devarch.c
index be29eab3c..90cc2f4b9 100644
--- a/sys/src/9/pc/devarch.c
+++ b/sys/src/9/pc/devarch.c
@@ -797,7 +797,7 @@ cpuidentify(void)
/*
* if there is one, set tsc to a known value
*/
- if(m->cpuiddx & Tsc){
+ if((m->cpuiddx & Tsc) != 0 && getconf("*notsc") == nil){
m->havetsc = 1;
cycles = _cycles;
if(m->cpuiddx & Cpumsr)