diff options
| author | aiju <aiju@phicode.de> | 2011-06-25 21:41:42 +0200 |
|---|---|---|
| committer | aiju <aiju@phicode.de> | 2011-06-25 21:41:42 +0200 |
| commit | fb37e71a2e00a8519b7bd12328d01e389c0625bc (patch) | |
| tree | e728e91b6d27d778b2875407a0cf035ebdae583c | |
| parent | a4436018f1dcbcd1dae39e16a8bebbb5afbf44ba (diff) | |
fixed horrible python ARM bug
| -rw-r--r-- | sys/src/cmd/python/plan9.c | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/sys/src/cmd/python/plan9.c b/sys/src/cmd/python/plan9.c index 94228077e..783632423 100644 --- a/sys/src/cmd/python/plan9.c +++ b/sys/src/cmd/python/plan9.c @@ -4,14 +4,6 @@ #include <u.h> #include <lib9.h> -#if defined(T386) -#define FPINVAL (1<<0) -#elif defined(Tarm) -#define FPINVAL (1<<16) -#else -Error define FPINVAL for your arch. grep /$cputype/include/u.h -#endif - Threadarg *_threadarg; extern DL_EXPORT(int) Py_Main(int, char **); @@ -21,7 +13,14 @@ main(int argc, char **argv) { Threadarg ta; - setfcr(getfcr()&~FPINVAL); +#if defined(T386) + setfcr(getfcr()&~(1<<0)); +#elif defined(Tarm) + setfsr(getfsr()&~(1<<16)); +#else +Error define code for disabling fp exceptions for your arch. +#endif + memset(&ta, 0, sizeof ta); _threadarg = &ta; if(setjmp(ta.jb)){ |