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| author | Ori Bernstein <ori@eigenstate.org> | 2021-01-23 20:36:09 -0800 |
|---|---|---|
| committer | Ori Bernstein <ori@eigenstate.org> | 2021-01-23 20:36:09 -0800 |
| commit | 5b8b5884f4eacd26b1e234c5abedd1615d895003 (patch) | |
| tree | 8d439f1056e0d8e6e355b6827f8ffcc3790c2e04 /sys/lib/python/idlelib/RemoteDebugger.py | |
| parent | f76e28cb71fd7f45eda35f68c89a6ba151625313 (diff) | |
5l: fix shifts by zero
on arm32, we can do one of 4 shifts
by a constant:
reg<<(0..31)
reg>>(1..32)
((u32int)reg)>>(1..32)
reg ROT (0..31)
There's no way to encode a 0 bit right
shift, so when encoding reg>>0, flip
it to the equivalent nop reg<<0, which
can be encoded.
Diffstat (limited to 'sys/lib/python/idlelib/RemoteDebugger.py')
0 files changed, 0 insertions, 0 deletions