diff options
| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2014-11-15 15:21:24 +0100 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2014-11-15 15:21:24 +0100 |
| commit | d069c9b486d2a2b9b26294023dd397f366d5e5ba (patch) | |
| tree | 0ae4502f013c5a134924c665185cc36e557dd547 /sys/src/9/pc/mem.h | |
| parent | 4e00cf6b1798fc95b3ccad8cb66a3e80c96b2786 (diff) | |
pc: get rid of fixed 8MB memory map (now dynamically between 4 to 16 MB depending on kernel size)
we now do mapping of KZERO to ROUND(end, 4*MB) where
end needs not to be above 16MB. this allows for bigger
kernels.
Diffstat (limited to 'sys/src/9/pc/mem.h')
| -rw-r--r-- | sys/src/9/pc/mem.h | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/sys/src/9/pc/mem.h b/sys/src/9/pc/mem.h index 79ab270d6..7f5b09a16 100644 --- a/sys/src/9/pc/mem.h +++ b/sys/src/9/pc/mem.h @@ -63,12 +63,14 @@ #define REBOOTADDR (0x11000) /* reboot code - physical address */ #define CPU0PDB (KZERO+0x12000) /* bootstrap processor PDB */ #define CPU0PTE (KZERO+0x13000) /* bootstrap processor PTE's for 0-4MB */ -#define CPU0GDT (KZERO+0x14000) /* bootstrap processor GDT */ -#define MACHADDR (KZERO+0x15000) /* as seen by current processor */ -#define CPU0MACH (KZERO+0x16000) /* Mach for bootstrap processor */ +#define CPU0PTE1 (KZERO+0x14000) /* bootstrap processor PTE's for 4-8MB */ +#define CPU0PTE2 (KZERO+0x15000) /* bootstrap processor PTE's for 8-12MB */ +#define CPU0PTE3 (KZERO+0x16000) /* bootstrap processor PTE's for 12-16MB */ +#define CPU0GDT (KZERO+0x17000) /* bootstrap processor GDT */ +#define MACHADDR (KZERO+0x18000) /* as seen by current processor */ +#define CPU0MACH (KZERO+0x19000) /* Mach for bootstrap processor */ #define MACHSIZE BY2PG -#define CPU0PTE1 (KZERO+0x17000) /* bootstrap processor PTE's for 4MB-8MB */ -#define CPU0END (CPU0PTE1+BY2PG) +#define CPU0END (CPU0MACH+BY2PG) /* * N.B. ramscan knows that CPU0END is the end of reserved data * N.B. _startPADDR knows that CPU0PDB is the first reserved page |