diff options
| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2019-04-08 14:12:01 +0200 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2019-04-08 14:12:01 +0200 |
| commit | 12fc1c7d3e04649fb7d213d16f9da597726dd7b6 (patch) | |
| tree | eb12c7dad308f4e98fc9519bb0d51461812d651a /sys/src/cmd/7l/optab.c | |
| parent | d8d4802f80b40bc9a43031e3d6484aa237e7d444 (diff) | |
7l: fix bitcon instruction selection and encoding
the possible bitmasks generated depend on the data width
of the instruction, so we introduce C_BITCON32 and C_BITCON64
operand types to keep them apart.
the encoding of the bitcon operation was wrong.
Diffstat (limited to 'sys/src/cmd/7l/optab.c')
| -rw-r--r-- | sys/src/cmd/7l/optab.c | 34 |
1 files changed, 26 insertions, 8 deletions
diff --git a/sys/src/cmd/7l/optab.c b/sys/src/cmd/7l/optab.c index c462857ed..a2d5bae36 100644 --- a/sys/src/cmd/7l/optab.c +++ b/sys/src/cmd/7l/optab.c @@ -42,25 +42,42 @@ Optab optab[] = /* logical operations */ { AAND, C_REG, C_REG, C_REG, 1, 4, 0 }, + { AANDW, C_REG, C_REG, C_REG, 1, 4, 0 }, { AAND, C_REG, C_NONE, C_REG, 1, 4, 0 }, + { AANDW, C_REG, C_NONE, C_REG, 1, 4, 0 }, { ABIC, C_REG, C_REG, C_REG, 1, 4, 0 }, + { ABICW, C_REG, C_REG, C_REG, 1, 4, 0 }, { ABIC, C_REG, C_NONE, C_REG, 1, 4, 0 }, + { ABICW, C_REG, C_NONE, C_REG, 1, 4, 0 }, - { AAND, C_BITCON, C_REG, C_REG, 53, 4, 0 }, - { AAND, C_BITCON, C_NONE, C_REG, 53, 4, 0 }, - { ABIC, C_BITCON, C_REG, C_REG, 53, 4, 0 }, - { ABIC, C_BITCON, C_NONE, C_REG, 53, 4, 0 }, + { AAND, C_BITCON64,C_REG,C_REG, 53, 4, 0 }, + { AANDW, C_BITCON32,C_REG,C_REG, 53, 4, 0 }, + { AAND, C_BITCON64,C_NONE,C_REG, 53, 4, 0 }, + { AANDW, C_BITCON32,C_NONE,C_REG, 53, 4, 0 }, + { ABIC, C_BITCON64,C_REG,C_REG, 53, 4, 0 }, + { ABICW, C_BITCON32,C_REG,C_REG, 53, 4, 0 }, + { ABIC, C_BITCON64,C_NONE,C_REG, 53, 4, 0 }, + { ABICW, C_BITCON32,C_NONE,C_REG, 53, 4, 0 }, { AAND, C_LCON, C_REG, C_REG, 28, 8, 0, LFROM }, + { AANDW, C_LCON, C_REG, C_REG, 28, 8, 0, LFROM }, { AAND, C_LCON, C_NONE, C_REG, 28, 8, 0, LFROM }, + { AANDW, C_LCON, C_NONE, C_REG, 28, 8, 0, LFROM }, { ABIC, C_LCON, C_REG, C_REG, 28, 8, 0, LFROM }, + { ABICW, C_LCON, C_REG, C_REG, 28, 8, 0, LFROM }, { ABIC, C_LCON, C_NONE, C_REG, 28, 8, 0, LFROM }, + { ABICW, C_LCON, C_NONE, C_REG, 28, 8, 0, LFROM }, { AAND, C_SHIFT,C_REG, C_REG, 3, 4, 0 }, + { AANDW, C_SHIFT,C_REG, C_REG, 3, 4, 0 }, { AAND, C_SHIFT,C_NONE, C_REG, 3, 4, 0 }, + { AANDW, C_SHIFT,C_NONE, C_REG, 3, 4, 0 }, { ABIC, C_SHIFT,C_REG, C_REG, 3, 4, 0 }, + { ABICW, C_SHIFT,C_REG, C_REG, 3, 4, 0 }, { ABIC, C_SHIFT,C_NONE, C_REG, 3, 4, 0 }, + { ABICW, C_SHIFT,C_NONE, C_REG, 3, 4, 0 }, + /* moves */ { AMOV, C_RSP, C_NONE, C_RSP, 24, 4, 0 }, { AMVN, C_REG, C_NONE, C_REG, 24, 4, 0 }, { AMOVB, C_REG, C_NONE, C_REG, 45, 4, 0 }, @@ -70,12 +87,13 @@ Optab optab[] = /* TO DO: MVN C_SHIFT */ /* MOVs that become MOVK/MOVN/MOVZ/ADD/SUB/OR */ - { AMOVW, C_MOVCON, C_NONE, C_REG, 32, 4, 0 }, + { AMOVW, C_MOVCON, C_NONE, C_REG, 32, 4, 0 }, { AMOV, C_MOVCON, C_NONE, C_REG, 32, 4, 0 }, -// { AMOVW, C_ADDCON, C_NONE, C_REG, 2, 4, 0 }, +// { AMOVW, C_ADDCON, C_NONE, C_REG, 2, 4, 0 }, // { AMOV, C_ADDCON, C_NONE, C_REG, 2, 4, 0 }, -// { AMOVW, C_BITCON, C_NONE, C_REG, 53, 4, 0 }, -// { AMOV, C_BITCON, C_NONE, C_REG, 53, 4, 0 }, + + { AMOV, C_BITCON64, C_NONE, C_REG, 53, 4, 0 }, + { AMOVW, C_BITCON32, C_NONE, C_REG, 53, 4, 0 }, { AMOVK, C_LCON, C_NONE, C_REG, 33, 4, 0 }, |