diff options
| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2015-02-05 23:08:46 +0100 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2015-02-05 23:08:46 +0100 |
| commit | 30871030f58f7f845dc5e6301df26acfecd0e5ac (patch) | |
| tree | f99fd80b34bfec5fc4385f9f55b6c442769a4277 /sys/src/cmd/aux/vga/db.c | |
| parent | b41ca13526dcdeb526005e5407073c1cbd9b5607 (diff) | |
aux/vga: remove vbs/vbe from mode, use shs/ehs when sync is ment, prefer detailed timing in edid
vbs/vbe members in Mode was only used in the vesadb
and cannot be changed from vgadb.
use shs/ehs in drivers when refering to the horizontal
sync pulse. clarify the matter in a comment.
link detailed timing modes at the head of the edid
modelist. these are the modes we'r interested in,
not the ones from vesadb.
Diffstat (limited to 'sys/src/cmd/aux/vga/db.c')
| -rw-r--r-- | sys/src/cmd/aux/vga/db.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/src/cmd/aux/vga/db.c b/sys/src/cmd/aux/vga/db.c index c6d426eab..1555cbefd 100644 --- a/sys/src/cmd/aux/vga/db.c +++ b/sys/src/cmd/aux/vga/db.c @@ -423,7 +423,7 @@ dbdumpmode(Mode* mode) mode->shs, mode->shs, mode->ehs, mode->ehs); Bprint(&stdout, "vt=%d (0x%X), vrs=%d (0x%X), vre=%d (0x%X)\n", mode->vt, mode->vt, mode->vrs, mode->vrs, mode->vre, mode->vre); - Bprint(&stdout, "hsync=%d, vsync=%d, interlace=%d\n", + Bprint(&stdout, "hsync=%c, vsync=%c, interlace=%c\n", mode->hsync, mode->vsync, mode->interlace); for(attr = mode->attr; attr; attr = attr->next) |