diff options
| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2015-02-05 23:08:46 +0100 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2015-02-05 23:08:46 +0100 |
| commit | 30871030f58f7f845dc5e6301df26acfecd0e5ac (patch) | |
| tree | f99fd80b34bfec5fc4385f9f55b6c442769a4277 /sys/src/cmd/aux/vga/igfx.c | |
| parent | b41ca13526dcdeb526005e5407073c1cbd9b5607 (diff) | |
aux/vga: remove vbs/vbe from mode, use shs/ehs when sync is ment, prefer detailed timing in edid
vbs/vbe members in Mode was only used in the vesadb
and cannot be changed from vgadb.
use shs/ehs in drivers when refering to the horizontal
sync pulse. clarify the matter in a comment.
link detailed timing modes at the head of the edid
modelist. these are the modes we'r interested in,
not the ones from vesadb.
Diffstat (limited to 'sys/src/cmd/aux/vga/igfx.c')
| -rw-r--r-- | sys/src/cmd/aux/vga/igfx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/src/cmd/aux/vga/igfx.c b/sys/src/cmd/aux/vga/igfx.c index 4b8a3900e..5fbea0443 100644 --- a/sys/src/cmd/aux/vga/igfx.c +++ b/sys/src/cmd/aux/vga/igfx.c @@ -670,7 +670,7 @@ inittrans(Trans *t, Mode *m) /* trans/pipe timing */ t->ht.v = (m->ht - 1)<<16 | (m->x - 1); - t->hs.v = (m->ehb - 1)<<16 | (m->shb - 1); + t->hs.v = (m->ehs - 1)<<16 | (m->shs - 1); t->vt.v = (m->vt - 1)<<16 | (m->y - 1); t->vs.v = (m->vre - 1)<<16 | (m->vrs - 1); |