diff options
| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2015-02-05 23:08:46 +0100 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2015-02-05 23:08:46 +0100 |
| commit | 30871030f58f7f845dc5e6301df26acfecd0e5ac (patch) | |
| tree | f99fd80b34bfec5fc4385f9f55b6c442769a4277 /sys/src/cmd/aux/vga/main.c | |
| parent | b41ca13526dcdeb526005e5407073c1cbd9b5607 (diff) | |
aux/vga: remove vbs/vbe from mode, use shs/ehs when sync is ment, prefer detailed timing in edid
vbs/vbe members in Mode was only used in the vesadb
and cannot be changed from vgadb.
use shs/ehs in drivers when refering to the horizontal
sync pulse. clarify the matter in a comment.
link detailed timing modes at the head of the edid
modelist. these are the modes we'r interested in,
not the ones from vesadb.
Diffstat (limited to 'sys/src/cmd/aux/vga/main.c')
| -rw-r--r-- | sys/src/cmd/aux/vga/main.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/sys/src/cmd/aux/vga/main.c b/sys/src/cmd/aux/vga/main.c index 188801e89..2e0431103 100644 --- a/sys/src/cmd/aux/vga/main.c +++ b/sys/src/cmd/aux/vga/main.c @@ -355,6 +355,16 @@ main(int argc, char** argv) if(vga->mode == nil) error("main: %s@%s not in %s\n", type, psize, monitordb); + /* + * because vga programs shb/ehb (Crt02, Crt03) the same as + * shs/ehs (Crt04, Crt05), only shb/ehb is specified in vgadb + * meaning the horizontal sync pulse start and end position. + */ + if(vga->mode->shs == 0) + vga->mode->shs = vga->mode->shb; + if(vga->mode->ehs == 0) + vga->mode->ehs = vga->mode->ehb; + if(virtual){ if((p = strchr(vsize, 'x')) == nil) error("bad virtual size %s\n", vsize); |