diff options
author | cinap_lenrek <cinap_lenrek@felloff.net> | 2015-02-05 23:08:46 +0100 |
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committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2015-02-05 23:08:46 +0100 |
commit | 30871030f58f7f845dc5e6301df26acfecd0e5ac (patch) | |
tree | f99fd80b34bfec5fc4385f9f55b6c442769a4277 /sys/src/cmd/aux/vga/vga.c | |
parent | b41ca13526dcdeb526005e5407073c1cbd9b5607 (diff) |
aux/vga: remove vbs/vbe from mode, use shs/ehs when sync is ment, prefer detailed timing in edid
vbs/vbe members in Mode was only used in the vesadb
and cannot be changed from vgadb.
use shs/ehs in drivers when refering to the horizontal
sync pulse. clarify the matter in a comment.
link detailed timing modes at the head of the edid
modelist. these are the modes we'r interested in,
not the ones from vesadb.
Diffstat (limited to 'sys/src/cmd/aux/vga/vga.c')
-rw-r--r-- | sys/src/cmd/aux/vga/vga.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/sys/src/cmd/aux/vga/vga.c b/sys/src/cmd/aux/vga/vga.c index 7fb79c2a7..7269a07b3 100644 --- a/sys/src/cmd/aux/vga/vga.c +++ b/sys/src/cmd/aux/vga/vga.c @@ -249,11 +249,7 @@ init(Vga* vga, Ctlr* ctlr) if(tmp & 0x20) vga->crt[0x05] |= 0x80; - if(mode->shs == 0) - mode->shs = mode->shb; vga->crt[0x04] = mode->shs>>3; - if(mode->ehs == 0) - mode->ehs = mode->ehb; vga->crt[0x05] |= ((mode->ehs>>3) & 0x1F); /* |