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authorSigrid Solveig Haflínudóttir <sigrid@ftrv.se>2023-05-14 21:59:28 +0000
committerSigrid Solveig Haflínudóttir <sigrid@ftrv.se>2023-05-14 21:59:28 +0000
commit3e44af25c66c8e04f22476a23556e5f848627185 (patch)
treeb972f992dcdfe15e05ed9f30714dcb5e66cde477 /sys/src/cmd
parent16656468211681edad2c8489b7d5fc9a8e219545 (diff)
7l: register offset loads/stores
Diffstat (limited to 'sys/src/cmd')
-rw-r--r--sys/src/cmd/7l/asmout.c14
-rw-r--r--sys/src/cmd/7l/optab.c14
-rw-r--r--sys/src/cmd/7l/span.c2
3 files changed, 29 insertions, 1 deletions
diff --git a/sys/src/cmd/7l/asmout.c b/sys/src/cmd/7l/asmout.c
index 495a4b8e0..9d29c30e3 100644
--- a/sys/src/cmd/7l/asmout.c
+++ b/sys/src/cmd/7l/asmout.c
@@ -875,6 +875,18 @@ asmout(Prog *p, Optab *o)
o1 |= 2<<23;
o1 |= (v&0x7F)<<15 | p->to.reg<<5 | p->from.reg | p->reg<<10;
break;
+
+ case 68: /* movT R(R),R; movT R[R],R -> ldrT */
+ v = p->from.offset;
+ o1 = olsxrr(p->as, v&31, p->from.reg, p->to.reg);
+ o1 |= ((v>>8)&7)<<13 | ((v>>16)&1)<<12;
+ break;
+
+ case 69: /* movT R,R(R); movT R,R[R] -> strT */
+ v = p->to.offset;
+ o1 = LD2STR(olsxrr(p->as, v&31, p->to.reg, p->from.reg));
+ o1 |= ((v>>8)&7)<<13 | ((v>>16)&1)<<12;
+ break;
}
if(debug['a'] > 1)
@@ -1580,6 +1592,8 @@ opldrpp(int a)
case AMOVHU: return 1<<30 | 7<<27 | 0<<26 | 0<<24 | 1<<22;
case AMOVB: return 0<<30 | 7<<27 | 0<<26 | 0<<24 | 2<<22;
case AMOVBU: return 0<<30 | 7<<27 | 0<<26 | 0<<24 | 1<<22;
+ case AFMOVS: return 2<<30 | 7<<27 | 1<<26 | 0<<24 | 1<<22;
+ case AFMOVD: return 3<<30 | 7<<27 | 1<<26 | 0<<24 | 1<<22;
case AMOVPW: return 0<<30 | 5<<27 | 0<<26 | 0<<23 | 1<<22; /* simm7<<15 | Rt2<<10 | Rn<<5 | Rt */
case AMOVPSW: return 1<<30 | 5<<27 | 0<<26 | 0<<23 | 1<<22;
case AMOVP: return 2<<30 | 5<<27 | 0<<26 | 0<<23 | 1<<22;
diff --git a/sys/src/cmd/7l/optab.c b/sys/src/cmd/7l/optab.c
index a05d8dd6e..580f8c6bc 100644
--- a/sys/src/cmd/7l/optab.c
+++ b/sys/src/cmd/7l/optab.c
@@ -157,6 +157,20 @@ Optab optab[] =
{ ACCMN, C_COND, C_REG, C_LCON, 19, 4, 0 }, /* from3 either C_REG or C_LCON */
+ /* register offset load */
+
+ { AMOV, C_ROFF, C_NONE, C_REG, 68, 4, 0 },
+ { AMOVW, C_ROFF, C_NONE, C_REG, 68, 4, 0 },
+ { AFMOVS, C_ROFF, C_NONE, C_FREG, 68, 4, 0 },
+ { AFMOVD, C_ROFF, C_NONE, C_FREG, 68, 4, 0 },
+
+ /* register offset store */
+
+ { AMOV, C_REG, C_NONE, C_ROFF, 69, 4, 0 },
+ { AMOVW, C_REG, C_NONE, C_ROFF, 69, 4, 0 },
+ { AFMOVS, C_FREG, C_NONE, C_ROFF, 69, 4, 0 },
+ { AFMOVD, C_FREG, C_NONE, C_ROFF, 69, 4, 0 },
+
/* scaled 12-bit unsigned displacement store */
{ AMOVB, C_REG, C_NONE, C_SEXT1, 20, 4, REGSB }, //
diff --git a/sys/src/cmd/7l/span.c b/sys/src/cmd/7l/span.c
index f37dc0930..15c584097 100644
--- a/sys/src/cmd/7l/span.c
+++ b/sys/src/cmd/7l/span.c
@@ -1365,8 +1365,8 @@ buildop(void)
break;
case AMOVPS:
- oprange[AMOVPS] = t;
oprange[AMOVPD] = t;
+ oprange[AMOVPQ] = t;
break;
}
}