diff options
author | aiju <devnull@localhost> | 2017-08-24 09:01:30 +0000 |
---|---|---|
committer | aiju <devnull@localhost> | 2017-08-24 09:01:30 +0000 |
commit | b0997d16c62d141e532b9a79993783531f6fc5ce (patch) | |
tree | a54f2451c57d285f8172c5a8f47929fb6eb71526 /sys/src/cmd | |
parent | 8968426327c93f47ff0d8123941b7d1d2077d6c7 (diff) |
vmx(1): fixed code that assumed uintptr==uvlong
Diffstat (limited to 'sys/src/cmd')
-rw-r--r-- | sys/src/cmd/vmx/vmx.c | 6 | ||||
-rw-r--r-- | sys/src/cmd/vmx/x86.c | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/sys/src/cmd/vmx/vmx.c b/sys/src/cmd/vmx/vmx.c index 28ec98a0d..60176fdbe 100644 --- a/sys/src/cmd/vmx/vmx.c +++ b/sys/src/cmd/vmx/vmx.c @@ -62,14 +62,14 @@ void modregion(Region *r) { if(r->segname == nil){ - if(fprint(mapfd, "--- wb %#ullx %#ullx\n", r->start, r->end) < 0) + if(fprint(mapfd, "--- wb %#ullx %#ullx\n", (uvlong)r->start, (uvlong)r->end) < 0) vmerror("updating memory map: %r"); }else if(fprint(mapfd, "%c%c%c wb %#ullx %#ullx %s %#ullx\n", (r->type & REGR) != 0 ? 'r' : '-', (r->type & REGW) != 0 ? 'w' : '-', (r->type & REGX) != 0 ? 'x' : '-', - r->start, r->end, r->segname, r->segoff) < 0) + (uvlong)r->start, (uvlong)r->end, r->segname, (uvlong)r->segoff) < 0) vmerror("updating memory map: %r"); } @@ -259,7 +259,7 @@ mkregion(u64int pa, u64int end, int type) r->type = type; for(s = mmap; s != nil; s = s->next) if(!(pa < s->start && end < s->end || pa >= s->start && pa >= s->end)) - sysfatal("region %#p-%#p overlaps region %#p-%#p", pa, end, s->start, s->end); + sysfatal("region %#p-%#p overlaps region %#p-%#p", (void*)pa, (void*)end, (void*)s->start, (void*)s->end); for(rp = &mmap; (*rp) != nil && (*rp)->start < end; rp = &(*rp)->next) ; r->next = *rp; diff --git a/sys/src/cmd/vmx/x86.c b/sys/src/cmd/vmx/x86.c index d4c7bfe25..214c3d52d 100644 --- a/sys/src/cmd/vmx/x86.c +++ b/sys/src/cmd/vmx/x86.c @@ -186,7 +186,7 @@ x86access(int seg, uintptr addr0, int asz, uvlong *val, int sz, int acc, TLB *tl if(sizeof(uintptr) == 8 && asz == 8){ if(seg == SEGFS || seg == SEGGS) addr += rget(baser[seg]); - if((u16int)((addr >> 48) + 1) > 1){ + if((u16int)(((u64int)addr >> 48) + 1) > 1){ gpf: if((acc & ACCSAFE) == 0){ vmdebug("gpf"); @@ -1060,7 +1060,7 @@ x86step(void) // print("flags=%#ux modrm=%#ux sib=%#ux disp=%#ullx imm=%#ullx\n", step.flags, step.modrm, step.sib, step.disp, step.imm); // print("op0: type=%#ux addr=%#ullx val=%#ullx sz=%d\n", , ); // print("op1: type=%#ux addr=%#ullx val=%#ullx sz=%d\n", step.op[1].type, step.op[1].addr, step.op[1].val, step.op[1].sz); - print("%#.*p %s (%#ux,%d,%#ullx,%#ullx) (%#ux,%d,%#ullx,%#ullx) si %#llux di %#llux\n", 2*step.mode, step.pc, enumconv((u8int)step.inf,buf,onames), step.op[0].type, step.op[0].sz, step.op[0].addr, step.op[0].val, step.op[1].type, step.op[1].sz, step.op[1].addr, step.op[1].val, rget(RSI), rget(RDI)); + print("%#.*p %s (%#ux,%d,%#ullx,%#ullx) (%#ux,%d,%#ullx,%#ullx) si %#llux di %#llux\n", 2*step.mode, step.pc, enumconv((u8int)step.inf,buf,onames), step.op[0].type, step.op[0].sz, (uvlong)step.op[0].addr, step.op[0].val, step.op[1].type, step.op[1].sz, (uvlong)step.op[1].addr, step.op[1].val, rget(RSI), rget(RDI)); switch((u8int)step.inf){ case OMOV: if((step.flags & (INSREP|INSREPNE|INSLOCK)) != 0) {giveup(); return 0;} |