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asmout.c
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Author
2023-05-18
7l, 7c: Remove STLP(W), finish LDAXR(W)/STLXR(W).
Aidan K. Wiggins
2023-05-16
7l: use floating point immediates where possible
Sigrid Solveig Haflínudóttir
2023-05-14
7l: register offset loads/stores
Sigrid Solveig Haflínudóttir
2023-05-14
7l: allow paired SIMD load/store, correct a few comments
Sigrid Solveig Haflínudóttir
2023-05-10
7l: rewrite Rl→REGTMP in the comment (thanks cinap)
Sigrid Solveig Haflínudóttir
2023-05-10
7c, 7l: revert CASE change, fix linker clobbering offset if given the same re...
Sigrid Solveig Haflínudóttir
2023-05-09
7l: throw an error if CASE uses the same register for base and offset (CASE R...
Sigrid Solveig Haflínudóttir
2019-05-09
7l: implement MOVP instruction
cinap_lenrek
2019-04-22
7l: there is no BIC* $bimm variant
cinap_lenrek
2019-04-17
7l: deal with huge (negative or > 24bit) register offsets, fix LACON, avoid D...
cinap_lenrek
2019-04-08
7l: fix bitcon instruction selection and encoding
cinap_lenrek
2019-04-08
7l: add arm64 linker (initial sync)
cinap_lenrek