Age | Commit message (Collapse) | Author |
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bios (from qu7uux)
new approach to graphics memory management:
the kernel driver never really cared about the size of stolen memory
directly. that was only to figure out the maximum allocation
to place the hardware cursor image somewhere at the end of the
allocation done by bios.
qu7uux's gm965 bios however wont steal enougth memory for his
native resolution so we have todo it manually.
the userspace igfx driver will figure out how much the bios
allocated by looking at the gtt only. then extend the memory by
creating a "fixed" physical segment.
the kernel driver allocates the memory for the cursor image
from normal kernel memory, and just maps it into the gtt at the
end of the virtual kernel framebuffer aperture.
thanks to qu7uux for the patch.
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- fix wrong bitfield for txctl (different between snb and ivb),
and enable tx before rx
- DPLL_CTL_x snb/ivb: don't touch reserved bits
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add support for edp, dp and hdmi on haswell and haswell ult.
vga, dvi and specific configurations like ulx are unimplemented.
remaining issue: edp link training always fails (time out).
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calculate fdi and displayport lane count
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data[mn] and link[mn] are 24-bit values.
in the expression 'm = (n * ((freq * bpp)/8)) / (lsclk * lanes)',
uvlongs are used to prevent integer overflow, but since freq, bpp, lsclk and
lanes are all ints, the cast to uvlong does not happen until it's too late,
getting a wrong value.
instead, use u32int for m and n, and use casts where necessary.
example of bad calculation:
freq = 141400000
lsclk = 270000000
lanes = 2
bpp = 18
→ 0x7f3ee1ca6 (correct value: 0x4b69d0)
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as usual, the dude with the hardware vanished so i cannot
develop this further. setting mode worked the last time
but only when using vesa before, so some bits are still
missing. commiting this as it is so i dont have to start
from scratch once we have hardware again.
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this code needs revision, need a list of cards where this actually
works.
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using /proc/$pid/mem to access vga bios is not portable and crashes
sgi machines when aux/vga is run. instead, try /dev/realmodemem
first (provided by realemu), then #v/vgabios.
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reporting)
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detailed timing in edid
vbs/vbe members in Mode was only used in the vesadb
and cannot be changed from vgadb.
use shs/ehs in drivers when refering to the horizontal
sync pulse. clarify the matter in a comment.
link detailed timing modes at the head of the edid
modelist. these are the modes we'r interested in,
not the ones from vesadb.
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igfx and vesa can determine monitor timing information from ddc
and store the edid info for connected monitors in vga->edid[].
when monitor type cannot be found in vgadb, we consult the edid
information and make a mode based on the edid info.
this avoids having to maintain a vgadb entry for each monitor.
monitor can be set to "[width]x[height]@[freq]Hz" for a specific
edid setting. when not found, a mode is searched based on the
size.
so the following should work:
aux/vga -m 1366x768@60Hz -l 1366x768x32
aux/vga -m auto -l 1366x768x32
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dbvesamode() modified the passed in size string in the process
of option parsing. this is a no-go because the string might be
constant in the read only section. provide cracksize() function
for the parsing and make a static copy.
do the vendor specific monitor detection in vbesnarf() instead
of vbecheck(). vbecheck()'s purpose is to check if vesa bios
service is avialable, not snarf graphics card state.
nvidiascale() was a no-op because it missed the vbecall() at
the end of the function. this means it was never tested so i
add the missing vbecall(), but disable nvidiascale for now
until someone tests this.
keep fancy stuff out of the Vbe structure. it is just there for
making bios calls, not keep state about the graphics card.
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allocate the hardware cursor plane at the end of
preallocated stolen graphics memory.
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program secret plane size and position registers described as "reserved"
in g45_vol_3_register_0_0.pdf that was found by inspecting vesa bios
port traces.
also, we have to set 18:19 (Cursor/Dispaly/Overlay Planes Off) in
PIPExCONF while programming the planes on this card. this is what
vesa bios does on modeset.
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enable sequence
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(like bios)
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controller pci device
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segment size
initially, pio was used to access registers so i didnt need
a kernel driver for initial testing.
pio does not work under efi, so use mmio to access registers.
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it turns out, the "magic" bits 27:28 are the frame start
delay setting that need to be preserved.
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this can even be used with the vesa driver, just
enable the cursor after mode switch like:
echo hwgc igfxhwgc >/dev/vgactl
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this driver can modeset lvds on x200s and x230.
everything else is completely untested.
no hardware cursor implemented.
no vgadb entries are provided.
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Prior to switching display, switch to text mode 3, which
is supported by anything, then set display, search for the
desired mode, load it if found. If not found, set the display
to the old one and switch to the old mode back.
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Magic was discovered by abusing INT 10 on several machines
while switching cables back and forth and watching the end result.
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Intel VBIOS seem to not update its state unless in graphical
mode, so set the scaling mode after loading new graphical mode.
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