summaryrefslogtreecommitdiff
path: root/sys/src/9/port/usbxhcipci.c
blob: 27c5e2204e1783de2122a18b94ec3808d029f784 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
#include	"u.h"
#include	"../port/lib.h"
#include	"mem.h"
#include	"dat.h"
#include	"fns.h"
#include	"io.h"
#include	"../port/pci.h"
#include	"../port/error.h"
#include	"../port/usb.h"

#include	"usbxhci.h"

static Xhci *ctlrs[Nhcis];

static void
pcidmaenable(Xhci *ctlr)
{
	Pcidev *pcidev = ctlr->aux;
	pcisetbme(pcidev);
}

static u64int
pciwaddr(void *va)
{
	return PCIWADDR(va);
}

static void
scanpci(void)
{
	static int already = 0;
	int i;
	u64int io, iosize;
	Xhci *ctlr;
	Pcidev *p;
	u32int *mmio; 

	if(already)
		return;
	already = 1;
	p = nil;
	while ((p = pcimatch(p, 0, 0)) != nil) {
		/*
		 * Find XHCI controllers (Programming Interface = 0x30).
		 */
		if(p->ccrb != Pcibcserial || p->ccru != Pciscusb || p->ccrp != 0x30)
			continue;
		if(p->mem[0].bar & 1)
			continue;
		iosize = p->mem[0].size;
		if(iosize == 0)
			continue;
		io = p->mem[0].bar & ~0x0f;
		if(io == 0)
			continue;
		print("usbxhci: %#x %#x: port %llux size %lld irq %d\n",
			p->vid, p->did, io, iosize, p->intl);
		mmio = vmap(io, iosize);
		if(mmio == nil){
			print("usbxhci: cannot map registers\n");
			continue;
		}
		ctlr = xhcialloc(mmio, io, iosize);
		if(ctlr == nil){
			print("usbxhci: no memory\n");
			vunmap(mmio, iosize);
			continue;
		}
		ctlr->aux = p;
		ctlr->dmaenable = pcidmaenable;
		ctlr->dmaaddr = pciwaddr;

		for(i = 0; i < nelem(ctlrs); i++)
			if(ctlrs[i] == nil){
				ctlrs[i] = ctlr;
				break;
			}
		if(i >= nelem(ctlrs))
			print("xhci: bug: more than %d controllers\n", nelem(ctlrs));
	}
}

static void
init(Hci *hp)
{
	Xhci *ctlr = hp->aux;
	Pcidev *pcidev = ctlr->aux;

	pcienable(pcidev);
	if(ctlr->mmio[0] == -1){
		pcidisable(pcidev);
		error("controller vanished");
	}
	xhciinit(hp);
}

static void
shutdown(Hci *hp)
{
	Xhci *ctlr = hp->aux;
	Pcidev *pcidev = ctlr->aux;

	xhcishutdown(hp);
	pcidisable(pcidev);
}

static int
reset(Hci *hp)
{
	Xhci *ctlr;
	Pcidev *pcidev;
	int i;

	if(getconf("*nousbxhci"))
		return -1;

	scanpci();

	/*
	 * Any adapter matches if no hp->port is supplied,
	 * otherwise the ports must match.
	 */
	for(i = 0; i < nelem(ctlrs); i++){
		ctlr = ctlrs[i];
		if(ctlr == nil)
			break;
		if(ctlr->active == nil)
		if(hp->port == 0 || hp->port == ctlr->base)
			goto Found;
	}
	return -1;

Found:
	pcidev = ctlr->aux;
	hp->irq = pcidev->intl;
	hp->tbdf = pcidev->tbdf;

	xhcilinkage(hp, ctlr);
	hp->init = init;
	hp->shutdown = shutdown;

	return 0;
}

void
usbxhcipcilink(void)
{
	addhcitype("xhci", reset);
}