1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
|
/*
* mpvecdigmul(mpdigit *b, int n, mpdigit m, mpdigit *p)
*
* p += b*m
*
* each step look like:
* hi,lo = m*b[i]
* lo += oldhi + carry
* hi += carry
* p[i] += lo
* oldhi = hi
*
* the registers are:
* hi = DX - constrained by hardware
* lo = AX - constrained by hardware
* b+n = SI - can't be BP
* p+n = DI - can't be BP
* i-n = BP
* m = BX
* oldhi = CX
*
*/
TEXT mpvecdigmuladd(SB),$0
MOVQ RARG,SI
MOVL n+8(FP),CX
MOVL m+16(FP),BX
MOVQ p+24(FP),DI
MOVL CX,BP
NEGQ BP /* BP = -n */
SHLL $2,CX
ADDQ CX,SI /* SI = b + n */
ADDQ CX,DI /* DI = p + n */
XORL CX,CX
_muladdloop:
MOVL (SI)(BP*4),AX /* lo = b[i] */
MULL BX /* hi, lo = b[i] * m */
ADDL CX,AX /* lo += oldhi */
ADCL $0, DX /* hi += carry */
ADDL AX,(DI)(BP*4) /* p[i] += lo */
ADCL $0, DX /* hi += carry */
MOVL DX,CX /* oldhi = hi */
INCQ BP /* i++ */
JNZ _muladdloop
XORL AX,AX
ADDL CX,(DI)(BP*4) /* p[n] + oldhi */
ADCL AX,AX /* return carry out of p[n] */
RET
|
